1. 4f4f85f clk: tegra: Implement memory-controller clock by Thierry Reding · 10 years ago
  2. 2ae7752 clk: tegra: remove legacy reset APIs by Stephen Warren · 11 years ago
  3. 6d5b988 clk: tegra: implement a reset driver by Stephen Warren · 11 years ago
  4. b29f9e9 clk: tegra: add TEGRA_PERIPH_NO_GATE by Peter De Schrijver · 11 years ago
  5. bc44275 clk: tegra: add locking to periph clks by Peter De Schrijver · 11 years ago
  6. 798e910 clk: tegra: Add support for PLLSS by Peter De Schrijver · 11 years ago
  7. a7c8485 clk: tegra: introduce common gen4 super clock by Peter De Schrijver · 11 years ago
  8. de4f30f clk: tegra: move PMC, fixed clocks to common files by Peter De Schrijver · 11 years ago
  9. 76ebc13 clk: tegra: move periph clocks to common file by Peter De Schrijver · 11 years ago
  10. 6609dbe clk: tegra: move audio clk to common file by Peter De Schrijver · 11 years ago
  11. 73d37e4 clk: tegra: add clkdev registration infra by Peter De Schrijver · 11 years ago
  12. b8700d5 clk: tegra: add common infra for DT clocks by Peter De Schrijver · 11 years ago
  13. ebe142b clk: tegra: move fields to tegra_clk_pll_params by Peter De Schrijver · 11 years ago
  14. 5bb9d26 clk: tegra: Add TEGRA_PERIPH_NO_DIV flag by Peter De Schrijver · 11 years ago
  15. 343a607 clk: tegra: common periph_clk_enb_refcnt and clks by Peter De Schrijver · 11 years ago
  16. d5ff89a clk: tegra: simplify periph clock data by Peter De Schrijver · 11 years ago
  17. 1c472d8 clk: tegra: T114: add DFLL DVCO reset control by Paul Walmsley · 11 years ago
  18. 25c9ded clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL by Paul Walmsley · 11 years ago
  19. 7b781c7 clk: tegra: Add fields for override bits by Peter De Schrijver · 11 years ago
  20. aa6fefd clk: tegra: allow PLL m,n,p init from SoC files by Peter De Schrijver · 11 years ago
  21. 061cec9 clk: tegra: Use common of_clk_init function by Prashant Gaikwad · 11 years ago
  22. 27aa99d clk: tegra: devicetree match for nvidia,tegra114-car by Peter De Schrijver · 11 years ago
  23. fdcccbd clk: tegra: Workaround for Tegra114 MSENC problem by Peter De Schrijver · 11 years ago
  24. a26a029 clk: tegra: Add flags to tegra_clk_periph() by Peter De Schrijver · 11 years ago
  25. c1d1939 clk: tegra: Add new fields and PLL types for Tegra114 by Peter De Schrijver · 11 years ago
  26. 3e72771 clk: tegra: move from a lock bit idx to a lock mask by Peter De Schrijver · 11 years ago
  27. 0b6525a clk: tegra: Add PLL post divider table by Peter De Schrijver · 11 years ago
  28. 7ba2881 clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE by Peter De Schrijver · 11 years ago
  29. dd93587 clk: tegra: Add TEGRA_PLL_BYPASS flag by Peter De Schrijver · 11 years ago
  30. dba4072 clk: tegra: Refactor PLL programming code by Peter De Schrijver · 11 years ago
  31. 441f199 clk: tegra: defer application of init table by Stephen Warren · 11 years ago
  32. ce4f331 clk: add table lookup to mux by Peter De Schrijver · 11 years ago
  33. b08e8c0 clk: tegra: add clock support for Tegra30 by Prashant Gaikwad · 12 years ago
  34. 37c26a9 clk: tegra: add clock support for Tegra20 by Prashant Gaikwad · 12 years ago
  35. 8f8f484 clk: tegra: add Tegra specific clocks by Prashant Gaikwad · 12 years ago