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gerrit-public.fairphone.software / kernel / msm-4.9 / 3945e47543863385b54d94c94b023ee7ca9df972 / drivers / gpu / drm / nouveau / nv50_fifo.c
  1. 3945e47 drm/nouveau: Refactor context destruction to avoid a lock ordering issue. by Francisco Jerez · 14 years ago
  2. cff5c13 drm/nouveau: add more fine-grained locking to channel list + structures by Ben Skeggs · 14 years ago
  3. 56ac747 drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hang by Ben Skeggs · 14 years ago
  4. e05c5a3 drm/nouveau: tidy ram{ht,fc,ro} a bit by Ben Skeggs · 14 years ago
  5. a8eaebc drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanity by Ben Skeggs · 14 years ago
  6. de3a6c0 drm/nouveau: rebase per-channel pramin heap offsets to 0 by Ben Skeggs · 14 years ago
  7. b3beb16 drm/nouveau: modify object accessors, offset in bytes rather than dwords by Ben Skeggs · 14 years ago
  8. ca6adb8 drm/nv50: fix RAMHT size by Ben Skeggs · 14 years ago
  9. ac94a34 drm/nv50: cleanup nv50_fifo.c by Ben Skeggs · 14 years ago
  10. f56cb86 drm/nouveau: add instmem flush() hook by Ben Skeggs · 14 years ago
  11. 9a391ad drm/nv50: switch to indirect push buffer controls by Ben Skeggs · 15 years ago
  12. ff9e527 drm/nouveau: protect channel create/destroy and irq handler with a spinlock by Maarten Maathuis · 15 years ago
  13. a87ff62 drm/nv50: delete ramfc object after disabling fifo, not before by Maarten Maathuis · 15 years ago
  14. 134f248 drm/nv50: fix alignment of per-channel fifo cache by Ben Skeggs · 15 years ago
  15. 7fb8ec8 drm/nv50: restore correct cache1 get/put address on fifoctx load by Ben Skeggs · 15 years ago
  16. 3c8868d drm/nv50: fix two potential suspend/resume oopses by Ben Skeggs · 15 years ago
  17. 6ee7386 drm/nouveau: Add DRM driver for NVIDIA GPUs by Ben Skeggs · 15 years ago