1. f1f4b77 OMAP3: clock: fix incorrect rate display when switching MPU rate at boot by Paul Walmsley · 14 years ago
  2. 59fb659 OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files by Paul Walmsley · 14 years ago
  3. 4d30e82 OMAP2/3 clock: combine OMAP2 & 3 boot-time MPU rate change code by Paul Walmsley · 14 years ago
  4. 657ebfa OMAP3/4 clock: split into per-chip family files by Paul Walmsley · 14 years ago