1. dceef5d drm/nouveau/fb: initialise vram controller as pfb sub-object by Ben Skeggs · 12 years ago
  2. 77145f1 drm/nouveau: port remainder of drm code, and rip out compat layer by Ben Skeggs · 12 years ago
  3. 861d210 drm/nouveau/fb: merge fb/vram and port to subdev interfaces by Ben Skeggs · 12 years ago
  4. 70790f4 drm/nouveau/clock: pull in the implementation from all over the place by Ben Skeggs · 12 years ago
  5. 02a841d drm/nouveau: restructure source tree, split core from drm implementation by Ben Skeggs · 12 years ago
  6. 44b9f44e nouveau: fixup scanout enable in nvc0_pm by Maarten Lankhorst · 12 years ago
  7. 9d6ba0b drm/nvc0/pm: very initial mclk freq change by Ben Skeggs · 13 years ago
  8. 6b91d6b drm/nvc0/pm: enable mpll src pll, and calc mpll coefficients by Ben Skeggs · 13 years ago
  9. a1da205 drm/nvc0/pm: start filling in memory reclocking stubs by Ben Skeggs · 13 years ago
  10. 1ae73f2 drm/nvc0/pm: restrict pll mode to clocks that can actually use it by Ben Skeggs · 13 years ago
  11. 045da4e drm/nvc0/pm: initial engine reclocking by Ben Skeggs · 13 years ago
  12. 8ce51fc drm/nvc0/pm: minor clock readback fixes by Ben Skeggs · 13 years ago
  13. 9698b9a drm/nvc0/pm: more complete parsing of clock domains by Ben Skeggs · 13 years ago
  14. 354d078 drm/nvc0/pm: initial implementation of clocks_get() by Ben Skeggs · 13 years ago