1. a17b9e4 clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent by Chen-Yu Tsai · 8 years ago
  2. 5254223 clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clk by Chen-Yu Tsai · 8 years ago
  3. d613782 clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLs by Chen-Yu Tsai · 8 years ago
  4. d832fdd clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocks by Chen-Yu Tsai · 8 years ago
  5. c6e6c96 clk: sunxi-ng: Add A31/A31s clocks by Chen-Yu Tsai · 8 years ago