Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 824ba603573d910e32df75fe6a5e7d7ec2a0a6a7 / arch / arm / mm / context.c
  1. 40ee068 ARM: 8465/1: mm: keep reserved ASIDs in sync with mm after multiple rollovers by Will Deacon · 9 years ago
  2. 8e64806 ARM: 8299/1: mm: ensure local active ASID is marked as allocated on rollover by Will Deacon · 10 years ago
  3. a391263 ARM: 8203/1: mm: try to re-use old ASID assignments following a rollover by Will Deacon · 10 years ago
  4. 5d49750 ARM: 7926/1: mm: flesh out and fix the comments in the ASID allocator by Will Deacon · 11 years ago
  5. a7a0410 ARM: 7925/1: mm: keep track of last ASID allocation to improve bitmap searching by Will Deacon · 11 years ago
  6. e1a5848 ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE by Will Deacon · 11 years ago
  7. f091578 ARM: tlb: don't perform inner-shareable invalidation for local TLB ops by Will Deacon · 12 years ago
  8. 1f49856 ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on non-Cortex-A15 by Fabio Estevam · 11 years ago
  9. 3c0c01a Merge branch 'devel-stable' into for-next by Russell King · 11 years ago
  10. 0d0752b ARM: 7769/1: Cortex-A15: fix erratum 798181 implementation by Marc Zyngier · 11 years ago
  11. b8e4a47 ARM: 7768/1: prevent risks of out-of-bound access in ASID allocator by Marc Zyngier · 11 years ago
  12. ae120d9 ARM: 7767/1: let the ASID allocator handle suspended animation by Marc Zyngier · 11 years ago
  13. 1fc84ae ARM: LPAE: use 64-bit accessors for TTBR registers by Cyril Chemparathy · 12 years ago
  14. 93dc688 ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations) by Catalin Marinas · 12 years ago
  15. 89c7e4b ARM: 7661/1: mm: perform explicit branch predictor maintenance when required by Will Deacon · 12 years ago
  16. 8a4e3a9 ARM: 7659/1: mm: make mm->context.id an atomic64_t variable by Will Deacon · 12 years ago
  17. 37f47e3 ARM: 7658/1: mm: fix race updating mm->context.id on ASID rollover by Will Deacon · 12 years ago
  18. 9520a5b ARM: 7649/1: mm: mm->context.id fix for big-endian by Ben Dooks · 12 years ago
  19. 3e99675 ARM: 7582/2: rename kvm_seq to vmalloc_seq so to avoid confusion with KVM by Nicolas Pitre · 12 years ago
  20. bf51bb8 ARM: mm: use bitmap operations when allocating new ASIDs by Will Deacon · 12 years ago
  21. 4b88316 ARM: mm: avoid taking ASID spinlock on fastpath by Will Deacon · 12 years ago
  22. b5466f8 ARM: mm: remove IPI broadcasting on ASID rollover by Will Deacon · 13 years ago
  23. ae3790b ARM: 7502/1: contextidr: avoid using bfi instruction during notifier by Will Deacon · 12 years ago
  24. 575320d ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process by Will Deacon · 12 years ago
  25. e323969 ARM: Remove current_mm per-cpu variable by Catalin Marinas · 13 years ago
  26. 7fec1b5 ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs by Catalin Marinas · 13 years ago
  27. 3c5f7e7 ARM: Use TTBR1 instead of reserved context ID by Will Deacon · 14 years ago
  28. 14d8c95 ARM: LPAE: Add context switching support by Catalin Marinas · 13 years ago
  29. bd31b85 locking, ARM: Annotate low level hw locks as raw by Thomas Gleixner · 15 years ago
  30. a0a54d3 Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks" by Russell King · 14 years ago
  31. 07989b7 Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID" by Russell King · 14 years ago
  32. 45b9523 ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks by Will Deacon · 14 years ago
  33. 52af9c6 ARM: 6943/1: mm: use TTBR1 instead of reserved context ID by Will Deacon · 14 years ago
  34. 11805bc ARM: 5905/1: ARM: Global ASID allocation on SMP by Catalin Marinas · 15 years ago
  35. df71dfd ARM: Fix errata 411920 workarounds by Russell King · 15 years ago
  36. 56f8ba8 cpumask: use mm_cpumask() wrapper: arm by Rusty Russell · 15 years ago
  37. 805f53f Merge branches 'armv7', 'at91', 'misc' and 'omap' into devel by Russell King · 18 years ago
  38. 065cf51 [ARM] armv7: add support for asid-tagged VIVT I-cache by Catalin Marinas · 18 years ago
  39. 8678c1f [ARM] Fix ASID version switch by Russell King · 18 years ago
  40. 9d99df4 [ARM] 4128/1: Architecture compliant TTBR changing sequence by Catalin Marinas · 18 years ago
  41. d84b471 [ARM] Move mmu.c out of the way by Russell King · 18 years ago[Renamed (96%) from arch/arm/mm/mmu.c]
  42. 1da177e Linux-2.6.12-rc2 by Linus Torvalds · 20 years ago