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gerrit-public.fairphone.software
/
kernel
/
msm-4.9
/
8ba4b3b9cc3d95714b31467614205fc26b91fb7c
/
drivers
/
clk
/
tegra
/
clk-pll.c
8ba4b3b
clk: tegra: Do not print errors for clk_round_rate()
by Thierry Reding
· 11 years ago
798e910
clk: tegra: Add support for PLLSS
by Peter De Schrijver
· 11 years ago
ebe142b
clk: tegra: move fields to tegra_clk_pll_params
by Peter De Schrijver
· 11 years ago
8e9cc80
clk: tegra: use pll_ref as the pll_e parent
by Peter De Schrijver
· 11 years ago
04edb09
clk: tegra: move some PLLC and PLLXC init to clk-pll.c
by Peter De Schrijver
· 11 years ago
00c674e
clk: tegra: Fix clock rate computation
by Thierry Reding
· 11 years ago
642fb0c
clk: tegra: PLLE spread spectrum control
by Peter De Schrijver
· 11 years ago
408a24f
clk: tegra: Use override bits when needed
by Peter De Schrijver
· 12 years ago
35d287a
clk: tegra: fix pllre initilization
by Peter De Schrijver
· 12 years ago
aa6fefd
clk: tegra: allow PLL m,n,p init from SoC files
by Peter De Schrijver
· 12 years ago
053b525
clk: tegra: pllc and pllxc should use pdiv_map
by Peter De Schrijver
· 12 years ago
c1d1939
clk: tegra: Add new fields and PLL types for Tegra114
by Peter De Schrijver
· 12 years ago
3e72771
clk: tegra: move from a lock bit idx to a lock mask
by Peter De Schrijver
· 12 years ago
0b6525a
clk: tegra: Add PLL post divider table
by Peter De Schrijver
· 12 years ago
7ba2881
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
by Peter De Schrijver
· 12 years ago
dd93587
clk: tegra: Add TEGRA_PLL_BYPASS flag
by Peter De Schrijver
· 12 years ago
dba4072
clk: tegra: Refactor PLL programming code
by Peter De Schrijver
· 12 years ago
8f8f484
clk: tegra: add Tegra specific clocks
by Prashant Gaikwad
· 12 years ago