1. a57c774 drm/i915: Reorganize display pipe register accesses by Antti Koskipaa · 10 years ago
  2. 76c3552f drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated. by Deepak S · 10 years ago
  3. fe27c60 drm/i915: enable HiZ Raw Stall Optimization on HSW by Chia-I Wu · 10 years ago
  4. 031994e drm/i915: Implement WaIncreaseL3CreditsForVLVB0:vlv by Ville Syrjälä · 11 years ago
  5. 6ba844b drm/i915: GEN7_MSG_CONTROL is ivb-only by Daniel Vetter · 11 years ago
  6. f64f172 drm/i915: Fix FBC_FENCE_OFF by Ville Syrjälä · 10 years ago
  7. 7f2cf22 drm/i915: Improve FBC plane defines a bit by Ville Syrjälä · 10 years ago
  8. 1157855 drm/i915: clock readout support for DDI v3 by Jesse Barnes · 11 years ago
  9. 7f1bdbc drm/i915: Only restore backlight combination mode reg for ums by Daniel Vetter · 11 years ago
  10. 85ba7b7 Revert "drm/i915: Mask reserved bits in display/sprite address registers" by Daniel Vetter · 10 years ago
  11. 232a6ee drm/i915: VLV2 - Fix hotplug detect bits by Todd Previte · 10 years ago
  12. bfbdb42 drm/i915: g4x/vlv: fix dp aux interrupt mask by Imre Deak · 11 years ago
  13. 669ab5a drm/i915/vlv: Add drpc debugfs support for valleyview by Deepak S · 11 years ago
  14. d0f8e45 drm/i915: remove unused WM defines by Imre Deak · 11 years ago
  15. ac9545f drm/i915: Add IVB DDB partitioning control by Ville Syrjälä · 11 years ago
  16. 0e79284 drm/i915: Reorder/respace MI instruction definition by Ben Widawsky · 11 years ago
  17. ab57fff drm/i915/bdw: Implement ff workarounds by Ben Widawsky · 11 years ago
  18. 63801f2 drm/i915/bdw: Force all Data Cache Data Port access to be Non-Coherent by Ben Widawsky · 11 years ago
  19. e9fe51c drm/i915: Use FLISDSI interface for band gap reset by Shobhit Kumar · 11 years ago
  20. 3dda20a drm/i915: Record BB_ADDR for every ring by Ville Syrjälä · 11 years ago
  21. 82f3449 drm/i915: Fix bogus FBC1 defines by Ville Syrjälä · 11 years ago
  22. 6b88f29 drm/i915/vlv: use parallel context restore when coming out of RC6 by Jesse Barnes · 11 years ago
  23. 46520e2 drm/i915: Fix GT wake FIFO free entries for VLV by Ville Syrjälä · 11 years ago
  24. 90f256b drm/i915: Report all GTFIFODBG errors by Ville Syrjälä · 11 years ago
  25. 4ea67bc drm/i915: Enable pipe gamma for sprites by Ville Syrjälä · 11 years ago
  26. 37c1d94 drm/i915: Emit SRM after the MSG_FBC_REND_STATE LRI by Ville Syrjälä · 11 years ago
  27. 4aeebd7 drm/i915: dp aux irq support for g4x/vlv by Daniel Vetter · 11 years ago
  28. c09cd6e Merge branch 'backlight-rework' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  29. e4607fc drm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write more PHY centric by Chon Ming Lee · 11 years ago
  30. ab0169b Merge tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm-intel into drm-next by Dave Airlie · 11 years ago
  31. 38d83c96 drm/i915: Wire up cpu fifo underrun reporting support for bdw by Daniel Vetter · 11 years ago
  32. 6d766f0 drm/i915: Wire up port A aux channel by Daniel Vetter · 11 years ago
  33. 30100f2 drm/i915: Fix up the bdw pipe interrupt enable lists by Daniel Vetter · 11 years ago
  34. c42664c drm/i915: Optimize pipe irq handling on bdw by Daniel Vetter · 11 years ago
  35. 4c2e7a5 drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints by Ben Widawsky · 11 years ago
  36. a75f362 drm/i915/bdw: conservative SBE VUE cache mode by Ben Widawsky · 11 years ago
  37. 7f88da0 drm/i915/bdw: Limit SDE poly depth FIFO to 2 by Ben Widawsky · 11 years ago
  38. bf66347 drm/i915/bdw: Sampler power bypass disable by Ben Widawsky · 11 years ago
  39. fd392b6 ddrm/i915/bdw: Disable centroid pixel perf optimization by Ben Widawsky · 11 years ago
  40. 4afe8d3 drm/i915/bdw: BWGTLB clock gate disable by Ben Widawsky · 11 years ago
  41. fe4ab3c drm/i915/bdw: Implement edp PSR workarounds by Ben Widawsky · 11 years ago
  42. ed8546a drm/i915/bdw: Support eDP PSR by Ben Widawsky · 11 years ago
  43. 2a114cc drm/i915/bdw: Use The GT mailbox for IPS enable/disable by Ben Widawsky · 11 years ago
  44. 416f472 drm/i915/bdw: Add Broadwell display FIFO limits by Ville Syrjälä · 11 years ago
  45. 8f93f4f drm/i915/bdw: add support for BDW DP voltage swings and pre-emphasis by Paulo Zanoni · 11 years ago
  46. e39bf98 drm/i915/bdw: get the correct LCPLL frequency on Broadwell by Paulo Zanoni · 11 years ago
  47. 756f85c drm/i915/bdw: Broadwell has PIPEMISC by Paulo Zanoni · 11 years ago
  48. 94e409c drm/i915/bdw: Implement PPGTT enable by Ben Widawsky · 11 years ago
  49. fbe5d36 drm/i915/bdw: Support BDW caching by Ben Widawsky · 11 years ago
  50. 1c7a062 drm/i915/bdw: dispatch updates (64b related) by Ben Widawsky · 11 years ago
  51. abd58f0 drm/i915/bdw: Implement interrupt changes by Ben Widawsky · 11 years ago
  52. 4e0bbc3 drm/i915/bdw: display stuff by Ben Widawsky · 11 years ago
  53. 8897644 drm/i915/bdw: HW context support by Ben Widawsky · 11 years ago
  54. 31a5336 drm/i915/bdw: Swizzling support by Ben Widawsky · 11 years ago
  55. ab3c759 drm/i915/vlv: Rename VLV DPIO register to be more structure to match configdb document. by Chon Ming Lee · 11 years ago
  56. 07bf139 drm/i915/vlv: use per-pipe backlight controls v2 by Jesse Barnes · 11 years ago
  57. 30a970c drm/i915/vlv: modeset_global_* for VLV v7 by Jesse Barnes · 11 years ago
  58. f341915 drm/i915: add bunit read/write routines by Jesse Barnes · 11 years ago
  59. 9ca2fe7 drm/i915/vlv: enable HDA display audio for Valleyview2 by Mengdong Lin · 11 years ago
  60. 7f16e5c Merge tag 'v3.12' into drm-intel-next by Daniel Vetter · 11 years ago
  61. 8409360 drm/i915: scramble reset support for DP port CRC on g4x by Daniel Vetter · 11 years ago
  62. 93d1f99 drm/i915/vlv: Fix typo in the DPIO register define. by Chon Ming Lee · 11 years ago
  63. 40da17c drm/i915: refactor ilk display interrupt handling by Daniel Vetter · 11 years ago
  64. 94e39e2 drm/i915: Capture batchbuffer state upon GPU hang by Chris Wilson · 11 years ago
  65. 8c7b72f drm/i915: Remove WaFbcDisableDpfcClockGating on HSW by Ben Widawsky · 11 years ago
  66. 153b4b95 drm/i915: Convert straggling MCHBAR registers by Ben Widawsky · 11 years ago
  67. 52f843f drm/i915: Wire up gen2 CRC support by Daniel Vetter · 11 years ago
  68. b073aea drm/i915: Fix PIPE_CRC_CTL for vlv by Daniel Vetter · 11 years ago
  69. b4437a4 drm/i915: CRC source selection #defines for gmch/vlv chips by Daniel Vetter · 11 years ago
  70. 0b5c5ed drm/i915: Adjust CRC capture for pre-gen5/vlv by Daniel Vetter · 11 years ago
  71. 828c790 drm/i915: Disable GGTT PTEs on GEN6+ suspend by Ben Widawsky · 11 years ago
  72. 5a69b89 drm/i915: crc support for hsw by Daniel Vetter · 11 years ago
  73. 5b3a856 drm/i915: wire up CRC interrupt for ilk/snb by Daniel Vetter · 11 years ago
  74. 5a6b5c8 drm/i915: add CRC #defines for ilk/snb by Daniel Vetter · 11 years ago
  75. 1a91510 drm/i915: set HDMI pixel clock in audio configuration by Jani Nikula · 11 years ago
  76. 8bf1e9f drm/i915: Expose latest 200 CRC value for pipe through debugfs by Shuang He · 11 years ago
  77. 1996d62 drm/i915: Adjust watermark register masks by Ville Syrjälä · 11 years ago
  78. cd66407 drm/i915: disable LVDS clock gating on CPT v2 by Jesse Barnes · 11 years ago
  79. 25a2e2d drm/i915: Fix VLV frame counter registers by Ville Syrjälä · 11 years ago
  80. 02f4c9e drm/i915/vlv: Turn off power gate for BIOS-less system. by Chon Ming Lee · 11 years ago
  81. 40e9cf6 drm/i915/vlv: reset DPIO on load and resume v2 by Jesse Barnes · 11 years ago
  82. dd75fdc drm/i915: Tweak RPS thresholds to more aggressively downclock by Chris Wilson · 11 years ago
  83. f3fc488 drm/i915/hsw: Disable L3 caching of atomic memory operations. by Francisco Jerez · 11 years ago
  84. e454a05 drm/i915/vlv: use correct units for rc6 residency v2 by Jesse Barnes · 11 years ago
  85. 49798eb drm/i915/vlv: use lower precision RC6 counter by Jesse Barnes · 11 years ago
  86. 24eb2d5 drm/i915: Program GMBUS Frequency based on the CDCLK for VLV. by Chon Ming Lee · 11 years ago
  87. 45f80d5 drm/i915: precendence bug in GT_PARITY_ERROR() by Dan Carpenter · 11 years ago
  88. 18b5992 drm/i915: Calculate PSR register offsets from base + gen by Ben Widawsky · 11 years ago
  89. 35a85ac drm/i915: Add second slice l3 remapping by Ben Widawsky · 11 years ago
  90. 515b239 drm/i915: write D_COMP using the mailbox by Paulo Zanoni · 11 years ago
  91. 18442d0 drm/i915: Fix port_clock and adjusted_mode.clock readout all over by Ville Syrjälä · 11 years ago
  92. a24c144 drm/i915: clean up power sequencing register port select definitions by Jani Nikula · 11 years ago
  93. 9435373 drm/i915: Report enabled slices on Haswell GT3 by Rodrigo Vivi · 11 years ago
  94. be4fc04 drm/i915: add VLV DSI PLL Calculations by ymohanma · 11 years ago
  95. 3230bf1 drm/i915: add MIPI DSI register definitions by Jani Nikula · 11 years ago
  96. b6ec10b drm/i915: add VLV pipeconf bit definition for DSI PLL lock by Jani Nikula · 11 years ago
  97. e9f882a drm/i915: add more VLV IOSF sideband ports accessors by Jani Nikula · 11 years ago
  98. 1f5d76d drm/i915: enable trickle feed on Haswell by Paulo Zanoni · 11 years ago
  99. 814c5f1 x86: add early quirk for reserving Intel graphics stolen memory v5 by Jesse Barnes · 11 years ago
  100. ffe74d7 drm/i915: Use RCS flips on Ivybridge+ by Chris Wilson · 11 years ago