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gerrit-public.fairphone.software
/
kernel
/
msm-4.9
/
a57c774ab2b849b9f53ec01308186355aa4227e5
/
drivers
/
gpu
/
drm
/
i915
/
i915_reg.h
a57c774
drm/i915: Reorganize display pipe register accesses
by Antti Koskipaa
· 10 years ago
76c3552f
drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.
by Deepak S
· 10 years ago
fe27c60
drm/i915: enable HiZ Raw Stall Optimization on HSW
by Chia-I Wu
· 10 years ago
031994e
drm/i915: Implement WaIncreaseL3CreditsForVLVB0:vlv
by Ville Syrjälä
· 11 years ago
6ba844b
drm/i915: GEN7_MSG_CONTROL is ivb-only
by Daniel Vetter
· 11 years ago
f64f172
drm/i915: Fix FBC_FENCE_OFF
by Ville Syrjälä
· 10 years ago
7f2cf22
drm/i915: Improve FBC plane defines a bit
by Ville Syrjälä
· 10 years ago
1157855
drm/i915: clock readout support for DDI v3
by Jesse Barnes
· 11 years ago
7f1bdbc
drm/i915: Only restore backlight combination mode reg for ums
by Daniel Vetter
· 11 years ago
85ba7b7
Revert "drm/i915: Mask reserved bits in display/sprite address registers"
by Daniel Vetter
· 10 years ago
232a6ee
drm/i915: VLV2 - Fix hotplug detect bits
by Todd Previte
· 10 years ago
bfbdb42
drm/i915: g4x/vlv: fix dp aux interrupt mask
by Imre Deak
· 11 years ago
669ab5a
drm/i915/vlv: Add drpc debugfs support for valleyview
by Deepak S
· 11 years ago
d0f8e45
drm/i915: remove unused WM defines
by Imre Deak
· 11 years ago
ac9545f
drm/i915: Add IVB DDB partitioning control
by Ville Syrjälä
· 11 years ago
0e79284
drm/i915: Reorder/respace MI instruction definition
by Ben Widawsky
· 11 years ago
ab57fff
drm/i915/bdw: Implement ff workarounds
by Ben Widawsky
· 11 years ago
63801f2
drm/i915/bdw: Force all Data Cache Data Port access to be Non-Coherent
by Ben Widawsky
· 11 years ago
e9fe51c
drm/i915: Use FLISDSI interface for band gap reset
by Shobhit Kumar
· 11 years ago
3dda20a
drm/i915: Record BB_ADDR for every ring
by Ville Syrjälä
· 11 years ago
82f3449
drm/i915: Fix bogus FBC1 defines
by Ville Syrjälä
· 11 years ago
6b88f29
drm/i915/vlv: use parallel context restore when coming out of RC6
by Jesse Barnes
· 11 years ago
46520e2
drm/i915: Fix GT wake FIFO free entries for VLV
by Ville Syrjälä
· 11 years ago
90f256b
drm/i915: Report all GTFIFODBG errors
by Ville Syrjälä
· 11 years ago
4ea67bc
drm/i915: Enable pipe gamma for sprites
by Ville Syrjälä
· 11 years ago
37c1d94
drm/i915: Emit SRM after the MSG_FBC_REND_STATE LRI
by Ville Syrjälä
· 11 years ago
4aeebd7
drm/i915: dp aux irq support for g4x/vlv
by Daniel Vetter
· 11 years ago
c09cd6e
Merge branch 'backlight-rework' into drm-intel-next-queued
by Daniel Vetter
· 11 years ago
e4607fc
drm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write more PHY centric
by Chon Ming Lee
· 11 years ago
ab0169b
Merge tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
by Dave Airlie
· 11 years ago
38d83c96
drm/i915: Wire up cpu fifo underrun reporting support for bdw
by Daniel Vetter
· 11 years ago
6d766f0
drm/i915: Wire up port A aux channel
by Daniel Vetter
· 11 years ago
30100f2
drm/i915: Fix up the bdw pipe interrupt enable lists
by Daniel Vetter
· 11 years ago
c42664c
drm/i915: Optimize pipe irq handling on bdw
by Daniel Vetter
· 11 years ago
4c2e7a5
drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints
by Ben Widawsky
· 11 years ago
a75f362
drm/i915/bdw: conservative SBE VUE cache mode
by Ben Widawsky
· 11 years ago
7f88da0
drm/i915/bdw: Limit SDE poly depth FIFO to 2
by Ben Widawsky
· 11 years ago
bf66347
drm/i915/bdw: Sampler power bypass disable
by Ben Widawsky
· 11 years ago
fd392b6
ddrm/i915/bdw: Disable centroid pixel perf optimization
by Ben Widawsky
· 11 years ago
4afe8d3
drm/i915/bdw: BWGTLB clock gate disable
by Ben Widawsky
· 11 years ago
fe4ab3c
drm/i915/bdw: Implement edp PSR workarounds
by Ben Widawsky
· 11 years ago
ed8546a
drm/i915/bdw: Support eDP PSR
by Ben Widawsky
· 11 years ago
2a114cc
drm/i915/bdw: Use The GT mailbox for IPS enable/disable
by Ben Widawsky
· 11 years ago
416f472
drm/i915/bdw: Add Broadwell display FIFO limits
by Ville Syrjälä
· 11 years ago
8f93f4f
drm/i915/bdw: add support for BDW DP voltage swings and pre-emphasis
by Paulo Zanoni
· 11 years ago
e39bf98
drm/i915/bdw: get the correct LCPLL frequency on Broadwell
by Paulo Zanoni
· 11 years ago
756f85c
drm/i915/bdw: Broadwell has PIPEMISC
by Paulo Zanoni
· 11 years ago
94e409c
drm/i915/bdw: Implement PPGTT enable
by Ben Widawsky
· 11 years ago
fbe5d36
drm/i915/bdw: Support BDW caching
by Ben Widawsky
· 11 years ago
1c7a062
drm/i915/bdw: dispatch updates (64b related)
by Ben Widawsky
· 11 years ago
abd58f0
drm/i915/bdw: Implement interrupt changes
by Ben Widawsky
· 11 years ago
4e0bbc3
drm/i915/bdw: display stuff
by Ben Widawsky
· 11 years ago
8897644
drm/i915/bdw: HW context support
by Ben Widawsky
· 11 years ago
31a5336
drm/i915/bdw: Swizzling support
by Ben Widawsky
· 11 years ago
ab3c759
drm/i915/vlv: Rename VLV DPIO register to be more structure to match configdb document.
by Chon Ming Lee
· 11 years ago
07bf139
drm/i915/vlv: use per-pipe backlight controls v2
by Jesse Barnes
· 11 years ago
30a970c
drm/i915/vlv: modeset_global_* for VLV v7
by Jesse Barnes
· 11 years ago
f341915
drm/i915: add bunit read/write routines
by Jesse Barnes
· 11 years ago
9ca2fe7
drm/i915/vlv: enable HDA display audio for Valleyview2
by Mengdong Lin
· 11 years ago
7f16e5c
Merge tag 'v3.12' into drm-intel-next
by Daniel Vetter
· 11 years ago
8409360
drm/i915: scramble reset support for DP port CRC on g4x
by Daniel Vetter
· 11 years ago
93d1f99
drm/i915/vlv: Fix typo in the DPIO register define.
by Chon Ming Lee
· 11 years ago
40da17c
drm/i915: refactor ilk display interrupt handling
by Daniel Vetter
· 11 years ago
94e39e2
drm/i915: Capture batchbuffer state upon GPU hang
by Chris Wilson
· 11 years ago
8c7b72f
drm/i915: Remove WaFbcDisableDpfcClockGating on HSW
by Ben Widawsky
· 11 years ago
153b4b95
drm/i915: Convert straggling MCHBAR registers
by Ben Widawsky
· 11 years ago
52f843f
drm/i915: Wire up gen2 CRC support
by Daniel Vetter
· 11 years ago
b073aea
drm/i915: Fix PIPE_CRC_CTL for vlv
by Daniel Vetter
· 11 years ago
b4437a4
drm/i915: CRC source selection #defines for gmch/vlv chips
by Daniel Vetter
· 11 years ago
0b5c5ed
drm/i915: Adjust CRC capture for pre-gen5/vlv
by Daniel Vetter
· 11 years ago
828c790
drm/i915: Disable GGTT PTEs on GEN6+ suspend
by Ben Widawsky
· 11 years ago
5a69b89
drm/i915: crc support for hsw
by Daniel Vetter
· 11 years ago
5b3a856
drm/i915: wire up CRC interrupt for ilk/snb
by Daniel Vetter
· 11 years ago
5a6b5c8
drm/i915: add CRC #defines for ilk/snb
by Daniel Vetter
· 11 years ago
1a91510
drm/i915: set HDMI pixel clock in audio configuration
by Jani Nikula
· 11 years ago
8bf1e9f
drm/i915: Expose latest 200 CRC value for pipe through debugfs
by Shuang He
· 11 years ago
1996d62
drm/i915: Adjust watermark register masks
by Ville Syrjälä
· 11 years ago
cd66407
drm/i915: disable LVDS clock gating on CPT v2
by Jesse Barnes
· 11 years ago
25a2e2d
drm/i915: Fix VLV frame counter registers
by Ville Syrjälä
· 11 years ago
02f4c9e
drm/i915/vlv: Turn off power gate for BIOS-less system.
by Chon Ming Lee
· 11 years ago
40e9cf6
drm/i915/vlv: reset DPIO on load and resume v2
by Jesse Barnes
· 11 years ago
dd75fdc
drm/i915: Tweak RPS thresholds to more aggressively downclock
by Chris Wilson
· 11 years ago
f3fc488
drm/i915/hsw: Disable L3 caching of atomic memory operations.
by Francisco Jerez
· 11 years ago
e454a05
drm/i915/vlv: use correct units for rc6 residency v2
by Jesse Barnes
· 11 years ago
49798eb
drm/i915/vlv: use lower precision RC6 counter
by Jesse Barnes
· 11 years ago
24eb2d5
drm/i915: Program GMBUS Frequency based on the CDCLK for VLV.
by Chon Ming Lee
· 11 years ago
45f80d5
drm/i915: precendence bug in GT_PARITY_ERROR()
by Dan Carpenter
· 11 years ago
18b5992
drm/i915: Calculate PSR register offsets from base + gen
by Ben Widawsky
· 11 years ago
35a85ac
drm/i915: Add second slice l3 remapping
by Ben Widawsky
· 11 years ago
515b239
drm/i915: write D_COMP using the mailbox
by Paulo Zanoni
· 11 years ago
18442d0
drm/i915: Fix port_clock and adjusted_mode.clock readout all over
by Ville Syrjälä
· 11 years ago
a24c144
drm/i915: clean up power sequencing register port select definitions
by Jani Nikula
· 11 years ago
9435373
drm/i915: Report enabled slices on Haswell GT3
by Rodrigo Vivi
· 11 years ago
be4fc04
drm/i915: add VLV DSI PLL Calculations
by ymohanma
· 11 years ago
3230bf1
drm/i915: add MIPI DSI register definitions
by Jani Nikula
· 11 years ago
b6ec10b
drm/i915: add VLV pipeconf bit definition for DSI PLL lock
by Jani Nikula
· 11 years ago
e9f882a
drm/i915: add more VLV IOSF sideband ports accessors
by Jani Nikula
· 11 years ago
1f5d76d
drm/i915: enable trickle feed on Haswell
by Paulo Zanoni
· 11 years ago
814c5f1
x86: add early quirk for reserving Intel graphics stolen memory v5
by Jesse Barnes
· 11 years ago
ffe74d7
drm/i915: Use RCS flips on Ivybridge+
by Chris Wilson
· 11 years ago
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