Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / a7d19057e7160a566bad9b2ba070a391fb78df96 / drivers / clk / zynq
  1. 8eaf503 clk: zynq: Move const initdata into correct code section by Soren Brinkmann · 10 years ago
  2. 034cc6e clk: zynq: Remove pointless return at end of void function by Soren Brinkmann · 10 years ago
  3. 88cebf5 clk: zynq: Remove unnecessary OOM message by Soren Brinkmann · 10 years ago
  4. 9268beb clk: zynq: Leave debug clocks in bootup state by Soren Brinkmann · 10 years ago
  5. 19bc2ee Merge tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux by Linus Torvalds · 10 years ago
  6. 4a32c74 ARM: zynq: Move of_clk_init from clock driver by Michal Simek · 10 years ago
  7. 2c97ec5 clk: zynq: Use clk_readl/clk_writel helper function by Michal Simek · 10 years ago
  8. b0504e3 ARM: zynq: Map I/O memory on clkc init by Michal Simek · 11 years ago
  9. ba52f8a clk/zynq/clkc: Add 'fclk-enable' feature by Soren Brinkmann · 11 years ago
  10. f8fe36f clk/zynq: Fix possible memory leak by Felipe Pena · 11 years ago
  11. bef4a0a Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux by Linus Torvalds · 11 years ago
  12. bddbd13 Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next by Mike Turquette · 11 years ago
  13. 353dc6c clk/zynq/pll: Use #defines for fbdiv min/max values by Soren Brinkmann · 11 years ago
  14. 14924ba clk/zynq/pll: Fix documentation for PLL register function by Soren Brinkmann · 11 years ago
  15. 819c1de clk: add CLK_SET_RATE_NO_REPARENT flag by James Hogan · 11 years ago
  16. 765b7d4 clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes by Soren Brinkmann · 11 years ago
  17. 252957c clk/zynq/clkc: Add dedicated spinlock for the SWDT by Soren Brinkmann · 11 years ago
  18. 30e1e28 arm: zynq: Migrate platform to clock controller by Soren Brinkmann · 11 years ago
  19. 0ee52b1 clk: zynq: Add clock controller driver by Soren Brinkmann · 11 years ago
  20. 3682af4 clk: zynq: Factor out PLL driver by Soren Brinkmann · 11 years ago