1. ac7f11c drm/i915: Move shared dpll struct definitions to separate header file by Ander Conselvan de Oliveira · 8 years ago
  2. 8106ddb drm/i915: Store a direct pointer to shared dpll in intel_crtc_state by Ander Conselvan de Oliveira · 8 years ago
  3. a4780b7 drm/i915: Split intel_get_shared_dpll() into smaller functions by Ander Conselvan de Oliveira · 8 years ago
  4. 55be2f0 drm/i915: Move ddi shared dpll code to intel_dpll_mgr.c by Ander Conselvan de Oliveira · 8 years ago
  5. 7abd4b3 drm/i915: Move shared dpll code to a new file by Ander Conselvan de Oliveira · 8 years ago
  6. 71f0a62 drm/i915: Only use sanitized values for ILK watermarks by Maarten Lankhorst · 8 years ago
  7. acad889 drm/i915/bxt: add missing DSI power domain to power well 1 by Jani Nikula · 8 years ago
  8. 9dfbffc drm/i915: Fix bogus dig_port_map[] assignment for pre-HSW by Takashi Iwai · 9 years ago
  9. 2abc525 drm/i915/gen9: Fix DMC firmware initialization by Imre Deak · 8 years ago
  10. 24a65e6 drm/i915/hangcheck: Prevent long walks across full-ppgtt by Mika Kuoppala · 9 years ago
  11. d431440 drm/i915: Generalise common GPU engine reset request/unrequest code by Tomas Elf · 9 years ago
  12. 37f2248 drm/i915: Use DIV_ROUND_CLOSEST for PWM calculations by Ville Syrjälä · 9 years ago
  13. a457f54 drm/i915: Clean up .get_aux_clock_divider() functions by Ville Syrjälä · 9 years ago
  14. 35d38d1 drm/i915: Read out hrawclk from CCK on vlv/chv by Ville Syrjälä · 9 years ago
  15. 193709c drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV by Ville Syrjälä · 9 years ago
  16. 6ffb1be drm/i915: Rename s/i9xx/g4x/ in DP code by Ville Syrjälä · 9 years ago
  17. e7dc33f drm/i915: Store rawclk_freq in dev_priv by Ville Syrjälä · 9 years ago
  18. 5ba0017 drm/i915: Do not wait atomically for display clocks by Tvrtko Ursulin · 8 years ago
  19. 0351b93 drm/i915: Do not lie about atomic timeout granularity by Tvrtko Ursulin · 8 years ago
  20. 643a24b drm/i915: Kconfig for extra driver debugging by Tvrtko Ursulin · 8 years ago
  21. 8de1b23 drm/i915/lrc: Do not wait atomically when stopping engines by Tvrtko Ursulin · 8 years ago
  22. 3f17762 drm/i915: Add wait_for_us by Tvrtko Ursulin · 8 years ago
  23. 782d25c drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards by Deepak M · 9 years ago
  24. e3bddde drm/i915: Only recalculate wm's for planes part of the state, v2. by Maarten Lankhorst · 9 years ago
  25. d81f04c drm/i915: Allow preservation of watermarks, v2. by Maarten Lankhorst · 9 years ago
  26. 1a426d6 drm/i915: Handle invalid ilk pipe watermarks correctly. by Maarten Lankhorst · 9 years ago
  27. 933bfb4 drm/i915: Hold RPM reference while setting freq limits through sysfs by Sagar Arun Kamble · 9 years ago
  28. ca37780 drm/i915: Avoid snooping with userptr where not supported by Tvrtko Ursulin · 9 years ago
  29. 32fff61 drm/i915: Do not return unknown status when load detection is tested. by Maarten Lankhorst · 9 years ago
  30. 5b773eb drm/i915/gen9: Remove state asserts when disabling DC states by Imre Deak · 9 years ago
  31. 66e2c4c drm/i915/gen9: Disable DC states if power well support is disabled by Imre Deak · 9 years ago
  32. a37baf3 drm/i915/gen9: Sanitize handling of allowed DC states by Imre Deak · 9 years ago
  33. 2622d79 drm/i915/skl: Fix power domain suspend sequence by Imre Deak · 9 years ago
  34. f85db05 drm/i915/error: Capture WA ctx batch in error state by arun.siluvery@linux.intel.com · 9 years ago
  35. debded8 drm/i915: Try to fix CRT port clock limits by Ville Syrjälä · 9 years ago
  36. 8802e5b drm/i915: Read out VGA dotclock properly on LPT by Ville Syrjälä · 9 years ago
  37. 64b46a0 drm/i915: Make the LPT iclkip 20MHz case more generic by Ville Syrjälä · 9 years ago
  38. 21a727b drm/i915: Remove the SPLL==270Mhz assumption from intel_fdi_link_freq() by Ville Syrjälä · 9 years ago
  39. e3b247d drm/i915: Move the encoder vs. FDI dotclock check out from encoder .get_config() by Ville Syrjälä · 9 years ago
  40. 1260f07 drm/i915: Dump ddi_pll_sel in hex instead of decimal on HSW/BDW by Ville Syrjälä · 9 years ago
  41. 2d7a215 drm/i915: Embed rotation_info under intel_framebuffer by Ville Syrjälä · 9 years ago
  42. 11f2032 drm/i915: Move the NULL sg handling out from rotate_pages() by Ville Syrjälä · 9 years ago
  43. 1663b9d drm/i915: Reorganize intel_rotation_info by Ville Syrjälä · 9 years ago
  44. 4f2d993 drm/i915: Pass drm_frambuffer to intel_compute_page_offset() by Ville Syrjälä · 9 years ago
  45. 3465c58 drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj() by Ville Syrjälä · 9 years ago
  46. 29cf949 drm/i915: Support for extra alignment for tiled surfaces by Ville Syrjälä · 9 years ago
  47. 8d0deca drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset() by Ville Syrjälä · 9 years ago
  48. 27ba391 drm/i915: s/tile_width/tile_width_bytes/ by Ville Syrjälä · 9 years ago
  49. 9106cf1 drm/i915: Account for the size of the chroma plane for the rotated gtt view by Ville Syrjälä · 9 years ago
  50. 1d5bf5d drm/i915: Add missing NULL check before calling initial_watermarks by Imre Deak · 9 years ago
  51. c6a2ac7 drm/i915: Execlists small cleanups and micro-optimisations by Tvrtko Ursulin · 9 years ago
  52. 3ba8607 drm/i915: Handle -EDEADLK in drm_atomic_commit from load-detect. by Maarten Lankhorst · 9 years ago
  53. d9f8e52 drm/i915: remove dead code by Eric Engestrom · 9 years ago
  54. c3454d5 drm/i915: remove left over dead code by Eric Engestrom · 9 years ago
  55. ed4a6a7 drm/i915: Add two-stage ILK-style watermark programming (v11) by Matt Roper · 9 years ago
  56. 5790ff7 drm/i915: Update DRIVER_DATE to 20160229 by Daniel Vetter · 9 years ago
  57. 2743179 drm/i915: Execlists cannot pin a context without the object by Chris Wilson · 9 years ago
  58. 596c592 drm/i915: Reduce the pointer dance of i915_is_ggtt() by Chris Wilson · 9 years ago
  59. 1c7f4bc drm/i915: Rename vma->*_list to *_link for consistency by Chris Wilson · 9 years ago
  60. 135dc79 drm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED(CONFIG_PM) by Chris Wilson · 9 years ago
  61. 99cf8ea drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RS by Michel Thierry · 9 years ago
  62. 7156291 drm/i915/gen9: Set value of Indirect Context Offset based on gen version by Michel Thierry · 9 years ago
  63. 032b612 drm/i915: Remove update_sprite_watermarks. by Maarten Lankhorst · 9 years ago
  64. e886167 drm/i915: Kill off intel_crtc->atomic.wait_vblank, v6. by Maarten Lankhorst · 9 years ago
  65. 33c8df89 drm/i915: Unify power domain handling. by Maarten Lankhorst · 9 years ago
  66. 74bff5f drm/i915: Pass crtc state to modeset_get_crtc_power_domains. by Maarten Lankhorst · 9 years ago
  67. 6831f3e drm/i915: Add for_each_pipe_masked() by Ville Syrjälä · 9 years ago
  68. aae8ba8 drm/i915: Make sure pipe interrupts are processed before turning off power well on BDW+ by Ville Syrjälä · 9 years ago
  69. 2230fde drm/i915: synchronize_irq() before turning off disp2d power well on VLV/CHV by Ville Syrjälä · 9 years ago
  70. 1ca993d drm/i915: Skip PIPESTAT reads from irq handler on VLV/CHV when power well is down by Ville Syrjälä · 9 years ago
  71. 1e657ad drm/i915/gen9: Write dc state debugmask bits only once by Mika Kuoppala · 9 years ago
  72. 5b07688 drm/i915/gen9: Extend dmc debug mask to include cores by Mika Kuoppala · 9 years ago
  73. 779cb5d drm/i915/gen9: Verify and enforce dc6 state writes by Mika Kuoppala · 9 years ago
  74. 832dba8 drm/i915/gen9: Check for DC state mismatch by Patrik Jakobsson · 9 years ago
  75. a98ee79 drm/i915/fbc: enable FBC by default on HSW and BDW by Paulo Zanoni · 9 years ago
  76. 0f3a93d drm/i915: drop unused i915.disable_vtd_wa module parameter by Jani Nikula · 9 years ago
  77. 57b63d0 drm/i915: drop write perm from module params which don't support changing by Jani Nikula · 9 years ago
  78. 0aa8bdf drm/i915/dsi: Using the bpp value wrt the pixel format by Deepak M · 9 years ago
  79. d6e3af5 drm/i915/bxt: Remove DSP CLK_GATE programming for BXT by Uma Shankar · 9 years ago
  80. 4d80003 drm/i915/skl: Ensure HW is powered during DDB HW state readout by Imre Deak · 9 years ago
  81. dd75619 drm/i915: Extract intel_encoder_has_connectors() by Ville Syrjälä · 9 years ago
  82. e28661b drm/i915: Use atomic state in intel_fb_initial_config. by Maarten Lankhorst · 9 years ago
  83. 7bb4afb drm/i915: Use correct dpms for intel_enable_crt. by Maarten Lankhorst · 9 years ago
  84. 0eadc62 drm/i915: Use atomic state in tv load detection. by Maarten Lankhorst · 9 years ago
  85. c8ecb2f drm/i915: Use atomic state for load detect in crt. by Maarten Lankhorst · 9 years ago
  86. edde361 drm/i915: Use atomic state to obtain load detection crtc, v3. by Maarten Lankhorst · 9 years ago
  87. 9b58e35 drm/i915: Enable PSR by default on Haswell and Broadwell. by Rodrigo Vivi · 9 years ago
  88. a38c274 drm/i915: Enable PSR by default on Valleyview and Cherryview. by Rodrigo Vivi · 9 years ago
  89. d94d6e8 drm/i915: Change i915.enable_psr parameter to use per platform default. by Rodrigo Vivi · 9 years ago
  90. 69603db i915: cast before shifting in i915_pte_count by Alan · 9 years ago
  91. ecb2448 drm/i915/lvds: Ensure the HW is powered during HW state readout by Imre Deak · 9 years ago
  92. 5b09217 drm/i915/hdmi: Ensure the HW is powered during HW state readout by Imre Deak · 9 years ago
  93. 3f3f42b drm/i915/dsi: Ensure the HW is powered during HW state readout by Imre Deak · 9 years ago
  94. 6fa9a5e drm/i915/dp: Ensure the HW is powered during HW state readout by Imre Deak · 9 years ago
  95. e129649 drm/i915: Ensure the HW is powered when accessing the CRC HW block by Imre Deak · 9 years ago
  96. e27daab drm/i915/ddi: Ensure the HW is powered during HW state readout by Imre Deak · 9 years ago
  97. 1c8fdda drm/i915/crt: Ensure the HW is powered during HW state readout by Imre Deak · 9 years ago
  98. 4feed0e drm/i915: Ensure the HW is powered during HW access in assert_pipe by Imre Deak · 9 years ago
  99. 6392f84 drm/i915: Ensure the HW is powered when disabling VGA by Imre Deak · 9 years ago
  100. 12fda38 drm/i915/ibx: Ensure the HW is powered during PLL HW readout by Imre Deak · 9 years ago