1. b2c3e38 ARM: redo TTBR setup code for LPAE by Russell King · 9 years ago
  2. 2c553ac ARM: 8164/1: mm: clear SCTLR.HA instead of setting it for LPAE by Will Deacon · 10 years ago
  3. 7e66cbc ARM: 8132/1: LPAE: drop wrong carry flag correction after adding TTBR1_OFFSET by Konstantin Khlebnikov · 10 years ago
  4. 7fb00c2 ARM: 8114/1: LPAE: load upper bits of early TTBR0/TTBR1 by Konstantin Khlebnikov · 10 years ago
  5. ded9477 ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE by Steven Capper · 10 years ago
  6. 6ebbf2c ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ by Russell King · 10 years ago
  7. 86f4062 ARM: 8037/1: mm: support big-endian page tables by Jianguo Wu · 10 years ago
  8. bf3f0f3 ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2 by Will Deacon · 11 years ago
  9. 8bd26e3 arm: delete __cpuinit/__CPUINIT usage from all ARM users by Paul Gortmaker · 11 years ago
  10. 4756dcb ARM: LPAE: accomodate >32-bit addresses for page table base by Cyril Chemparathy · 12 years ago
  11. a7fbc0d ARM: LPAE: factor out T1SZ and TTBR1 computations by Cyril Chemparathy · 12 years ago
  12. 13f659b ARM: LPAE: use phys_addr_t in switch_mm() by Cyril Chemparathy · 12 years ago
  13. ae8a8b9 ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead by Will Deacon · 11 years ago
  14. 78305c8 ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id by Ben Dooks · 11 years ago
  15. 251019f ARM: 7650/1: mm: replace direct access to mm->context.id with new macro by Ben Dooks · 12 years ago
  16. 26ffd0d ARM: mm: introduce present, faulting entries for PAGE_NONE by Will Deacon · 12 years ago
  17. dbf62d5 ARM: mm: introduce L_PTE_VALID for page table entries by Will Deacon · 12 years ago
  18. 1b6ba46 ARM: LPAE: MMU setup for the 3-level page table format by Catalin Marinas · 13 years ago