1. b700f42 ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance by Kishon Vijay Abraham I · 10 years ago
  2. ba5137b ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY by Kishon Vijay Abraham I · 10 years ago
  3. 4310e90 ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck by Keerthy · 10 years ago
  4. 147e541 ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock by Keerthy · 10 years ago
  5. 3f6eec9 Merge branch 'for-v3.16/ti-clk-drv' of github.com:t-kristo/linux-pm into clk-next by Mike Turquette · 10 years ago
  6. 7e14807 ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies by Nishanth Menon · 10 years ago
  7. 0cccd91 ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock by Peter Ujfalusi · 10 years ago
  8. 032d774 ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate by Roger Quadros · 10 years ago
  9. 8c0b4fd ARM: dts: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift by Peter Ujfalusi · 10 years ago
  10. a0289f9 ARM: dts: DRA7: Add PCIe related clock nodes by J Keerthy · 11 years ago
  11. c3be7ac ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock by J Keerthy · 11 years ago
  12. 7d138d3 ARM: dts: clk: Add apll related clocks by J Keerthy · 11 years ago
  13. ee6c750 ARM: dts: dra7 clock data by Tero Kristo · 11 years ago