1. e7a932b ARM: tegra: add LP1 suspend support for Tegra30 by Joseph Lo · 11 years ago
  2. 2f5aaa3 ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15 by Joseph Lo · 11 years ago
  3. ac2527b ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL by Joseph Lo · 11 years ago
  4. f6d06f3 ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9 by Joseph Lo · 11 years ago
  5. 1d32860 ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode by Joseph Lo · 12 years ago
  6. 5788661 ARM: tegra: update the cache maintenance order for CPU shutdown by Joseph Lo · 12 years ago
  7. 29a0e7b ARM: tegra: retain L2 content over CPU suspend/resume by Joseph Lo · 12 years ago
  8. d552920 ARM: tegra30: cpuidle: add powered-down state for CPU0 by Joseph Lo · 12 years ago
  9. d457ef35 ARM: tegra30: cpuidle: add powered-down state for secondary CPUs by Joseph Lo · 12 years ago
  10. 2be39c0 ARM: tegra: move iomap.h to mach-tegra by Stephen Warren · 12 years ago
  11. c2be5bf ARM: tegra: clean up the common assembly macros into sleep.h by Joseph Lo · 12 years ago
  12. b4e395b ARM: tegra: Remove flow controller programming by Prashant Gaikwad · 12 years ago
  13. 7175f80 ARM: tegra: Include assembler.h in sleep.S to fix build break by Stephen Warren · 13 years ago
  14. c76fcc8 ARM: tegra: assembler code for LP3 by Peter De Schrijver · 13 years ago