1. 4d48edb ARM: tegra20: Store CPU "resettable" status in IRAM by Dmitry Osipenko · 10 years ago
  2. e4a68009 ARM: tegra: Re-add removed SoC id macro to tegra_resume() by Dmitry Osipenko · 10 years ago
  3. 304664e ARM: tegra: Use a function to get the chip ID by Thierry Reding · 10 years ago
  4. a0524ac ARM: tegra: Sort includes alphabetically by Thierry Reding · 10 years ago
  5. b16cee7 ARM: l2c: tegra: convert to common l2c310 early resume functionality by Russell King · 11 years ago
  6. d127e9c ARM: tegra: make tegra_resume can work with current and later chips by Joseph Lo · 11 years ago
  7. 5b795d0 ARM: tegra: add common resume handling code for LP1 resuming by Joseph Lo · 11 years ago
  8. 2f5aaa3 ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15 by Joseph Lo · 11 years ago
  9. c04c775 ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 by Joseph Lo · 11 years ago
  10. af7f322 ARM: tegra: remove ifdef in the tegra_resume by Joseph Lo · 12 years ago
  11. 33d5c01 ARM: tegra114: add CPU hotplug support by Joseph Lo · 12 years ago
  12. ecc4d9d ARM: tegra: make tegra_resume can work for Tegra114 by Joseph Lo · 12 years ago
  13. 4b3e2ed ARM: tegra: add an assembly marco to check Tegra SoC ID by Joseph Lo · 12 years ago
  14. a65dc10 ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled by Joseph Lo · 12 years ago
  15. b095ae2 ARM: tegra: don't unlock MMIO access to DBGLAR by Joseph Lo · 12 years ago
  16. c34f30e ARM: tegra: add CPU errata WARs to Tegra reset handler by Stephen Warren · 12 years ago
  17. 9e32366 ARM: tegra: make device can run on UP by Joseph Lo · 12 years ago