1. 4494377 clk: spear3xx: Set proper clock parent of uart1/2 by Thomas Gleixner · 10 years ago
  2. 15ebb05 clk: spear3xx: Use proper control register offset by Thomas Gleixner · 10 years ago
  3. 3c9210b clk: SPEAr: Staticize clk_frac_ops by Sachin Kamat · 11 years ago
  4. 819c1de clk: add CLK_SET_RATE_NO_REPARENT flag by James Hogan · 11 years ago
  5. 0b63cc3 clk: spear: fix build error for spear3xx by Arnd Bergmann · 11 years ago
  6. 99c6bcf Merge tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc by Linus Torvalds · 11 years ago
  7. 0498172 clk:SPEAr1340: Correct parent clock configuration by Vipul Kumar Samar · 11 years ago
  8. d9909eb ARM: spear: make clock driver independent of headers by Arnd Bergmann · 12 years ago
  9. 0beb587 Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc by Linus Torvalds · 12 years ago
  10. 07e812a ARM: SPEAr1310: Move 1310 specific misc register into machine specific files by Vipul Kumar Samar · 12 years ago
  11. b70e6d00 CLK: SPEAr: Remove unused dummy apb_pclk by Vipul Kumar Samar · 12 years ago
  12. 1b2d4ad5 CLK: SPEAr: Correct index scanning done for clock synths by Deepak Sikri · 12 years ago
  13. ef0fd0a CLK: SPEAr: Update clock rate table by Deepak Sikri · 12 years ago
  14. cd4b519 CLK: SPEAr: Add missing clocks by Vipul Kumar Samar · 12 years ago
  15. 1249979 CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks by Vipul Kumar Samar · 12 years ago
  16. 463f9e2 CLK: SPEAr13xx: fix parent names of multiple clocks by Shiraz Hashim · 12 years ago
  17. e0b9c21 CLK: SPEAr13xx: Fix mux clock names by Shiraz Hashim · 12 years ago
  18. df2449a CLK: SPEAr: Fix dev_id & con_id for multiple clocks by Rajeev Kumar · 12 years ago
  19. 90d4971 clk: spear: Add stub functions for spear3[0|1|2]0_clk_init() by Axel Lin · 12 years ago
  20. 7d4998f clk: SPEAr: Vco-pll: Fix compilation warning by Viresh Kumar · 12 years ago
  21. d4f513f Clk: SPEAr1340: Update sys clock parent array by Vipul Kumar Samar · 12 years ago
  22. d9ba8db clk: SPEAr1340: Fix clk enable register for uart1 and i2c1. by Vipul Kumar Samar · 12 years ago
  23. a8f4bf0 Clk:spear6xx:Fix: Rename clk ids within predefined limit by Vipul Kumar Samar · 12 years ago
  24. 5cfc545 Clk:spear3xx:Fix: Rename clk ids within predefined limit by Vipul Kumar Samar · 12 years ago
  25. e28f1aa clk:spear1310:Fix: Rename clk ids within predefined limit by Vipul Kumar Samar · 12 years ago
  26. 5cb6a9b clk:spear1340:Fix: Rename clk ids within predefined limit by Vipul Kumar Samar · 12 years ago
  27. 3a35fc3 clk: SPEAr600: Fix ethernet clock name for DT based probing by Stefan Roese · 12 years ago
  28. 10d8935 Viresh has moved by Viresh Kumar · 12 years ago
  29. 0b928af SPEAr13xx: Add common clock framework support by Viresh Kumar · 12 years ago
  30. 5df33a6 SPEAr: Switch to common clock framework by Viresh Kumar · 12 years ago
  31. a45896b SPEAr: clk: Add General Purpose Timer Synthesizer clock by Viresh Kumar · 12 years ago
  32. 270b9f4 SPEAr: clk: Add Fractional Synthesizer clock by Viresh Kumar · 12 years ago
  33. 5335a63 SPEAr: clk: Add Auxiliary Synthesizer clock by Viresh Kumar · 12 years ago
  34. 55b8fd4 SPEAr: clk: Add VCO-PLL Synthesizer clock by Viresh Kumar · 12 years ago