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gerrit-public.fairphone.software / kernel / msm-4.9 / dbff2dee9f8561710fcfe7f6623dd272ddca5a27 / drivers / gpu / drm / nouveau / nv50_pm.c
  1. 77145f1 drm/nouveau: port remainder of drm code, and rip out compat layer by Ben Skeggs · 12 years ago
  2. ebb945a drm/nouveau: port all engines to new engine module format by Ben Skeggs · 12 years ago
  3. 861d210 drm/nouveau/fb: merge fb/vram and port to subdev interfaces by Ben Skeggs · 12 years ago
  4. 70790f4 drm/nouveau/clock: pull in the implementation from all over the place by Ben Skeggs · 12 years ago
  5. 02a841d drm/nouveau: restructure source tree, split core from drm implementation by Ben Skeggs · 12 years ago
  6. e436d1b drm/nv50/hwsq: some nv92 fixes by Martin Peres · 12 years ago
  7. c57ebf5e drm/nv50/pm: wait for all fifo-connected engines to idle before reclocking by Martin Peres · 13 years ago
  8. 496a73b drm/nv50/pm: use hwsq for engine reclocking too by Ben Skeggs · 13 years ago
  9. e495d0d drm/nv50/disp: more accurate function to determine active crtcs by Ben Skeggs · 13 years ago
  10. 6bdf68c drm/nv50/pm: initial work towards proper memory reclocking, with timings by Ben Skeggs · 13 years ago
  11. a9d9938 drm/nv50/pm: signedness bug in nv50_pm_clocks_pre() by Dan Carpenter · 13 years ago
  12. 675aac0 drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct by Ben Skeggs · 13 years ago
  13. c8b9641 drm/nouveau/hwsq: remove some magic, give proper opcode names by Ben Skeggs · 13 years ago
  14. eeb7a50 drm/nv50/pm: introduce hwsq-based memory reclocking by Martin Peres · 13 years ago
  15. d467646 drm/nv50/pm: fix a typo in clock calculation by Martin Peres · 13 years ago
  16. d249156 drm/nv50/pm: only touch 0x611200 on nv92- by Ben Skeggs · 13 years ago
  17. 8b5f4d0 drm/nv50/pm: stabilise transition to 100MHz mclk a bit by Ben Skeggs · 13 years ago
  18. 973e861 drm/nv50/pm: avoid touching dom6/vdec clocks if perflvl doesn't define it by Ben Skeggs · 13 years ago
  19. 463464e drm/nv50/pm: fix thinko which lead to clocks being slightly off sometimes by Ben Skeggs · 13 years ago
  20. 6805979 drm/nv50/pm: 0x84/0x86 can't use "1" for nvclk src, need 0x50 method by Ben Skeggs · 13 years ago
  21. 19fa224 drm/nv50/pm: free state struct after setting clocks by Ben Skeggs · 13 years ago
  22. f3fbaf3 drm/nv50/pm: rewrite clock management, and switch to the new pm hooks by Ben Skeggs · 13 years ago
  23. 5a4267a drm/nv50/pm: convert to new fanspeed pwm controller hooks by Ben Skeggs · 13 years ago
  24. 3f8e11e drm/nv50/pm: mostly nailed down fan pwm frequency selection by Ben Skeggs · 13 years ago
  25. cb9fa62 drm/nv50/pm: add support for pwm fan control by Ben Skeggs · 13 years ago
  26. 02e4f58 drm/nouveau/bios: allow passing in crtc to the init table parser by Ben Skeggs · 13 years ago
  27. 619d4f7 drm/nv50: improve nv50_pm_get_clock() by Emil Velikov · 13 years ago
  28. fade7ad drm/nva3: split pm backend out from nv50 by Ben Skeggs · 14 years ago
  29. aee582d drm/nouveau: run perflvl and M table scripts on mem clock change by Ben Skeggs · 14 years ago
  30. 5c6dc65 drm/nouveau: pass perflvl struct to clock_pre() by Ben Skeggs · 14 years ago
  31. 6f87698 drm/nouveau: allow static performance level setting by Ben Skeggs · 14 years ago
  32. 02c30ca drm/nv50: import initial clock get/set routines + hook up pm engine by Ben Skeggs · 14 years ago