1. f4dee85 [MIPS] sparsemem: fix crash in show_mem by Atsushi Nemoto · 18 years ago
  2. 115f2a4 [MIPS] Print out TLB handler assembly for debugging. by Thiemo Seufer · 18 years ago
  3. 2874fe5 [MIPS] vr41xx: Replace magic number for P4K bit with symbol. by Yoichi Yuasa · 18 years ago
  4. 1058ecd [MIPS] vr41xx: Changed workaround to recommended method by Yoichi Yuasa · 18 years ago
  5. 565200a [MIPS] Do not count pages in holes with sparsemem by Atsushi Nemoto · 18 years ago
  6. 4e8ab36 [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80. by Yoichi Yuasa · 18 years ago
  7. fc5d2d2 [MIPS] Use the proper technical term for naming some of the cache macros. by Ralf Baechle · 18 years ago
  8. 6ab3d56 Remove obsolete #include <linux/config.h> by Jörn Engel · 18 years ago
  9. 2e78ae3 [MIPS] 74K: Assume it will also have an AR bit in config7 by Ralf Baechle · 18 years ago
  10. beab375 [MIPS] Treat CPUs with AR bit as physically indexed. by Ralf Baechle · 18 years ago
  11. a2c2bc4 [MIPS] MIPS32/MIPS64 S-cache fix and cleanup by Atsushi Nemoto · 18 years ago
  12. 73f4035 [MIPS] Fix handling of 0 length I & D caches. by Chris Dearman · 18 years ago
  13. 9318c51 [MIPS] MIPS32/MIPS64 secondary cache management by Chris Dearman · 18 years ago
  14. 5deee2d [MIPS] Remove prototype for non-existing function. by Ralf Baechle · 19 years ago
  15. b1c231f [MIPS] Fix sparsemem support. by Chad Reese · 19 years ago
  16. 9370b35 [MIPS] Save write-only Config.OD from being clobbered by Sergei Shtylyov · 19 years ago
  17. 44d921b [MIPS] Treat R14000 like R10000. by Kumba · 19 years ago
  18. 7f3f1d0 [MIPS] Fix deadlock on MP with cache aliases. by Ralf Baechle · 19 years ago
  19. c620953 [MIPS] Fix detection and handling of the 74K processor. by Chris Dearman · 19 years ago
  20. 98a41de [MIPS] Add missing 34K processor IDs by Nigel Stephens · 19 years ago
  21. 3c68da7 [MIPS] Use __ffs() instead of ffs() for waybit calculation. by Atsushi Nemoto · 19 years ago
  22. 7e3bfc7 [MIPS] Handle IDE PIO cache aliases on SMP. by Ralf Baechle · 19 years ago
  23. 41c594a [MIPS] MT: Improved multithreading support. by Ralf Baechle · 19 years ago
  24. 67a3f6d [MIPS] Fix tx49_blast_icache32_page_indexed. by Atsushi Nemoto · 19 years ago
  25. f13b68e [MIPS] Fix CONFIG_LIMITED_DMA build. by Ralf Baechle · 19 years ago
  26. 91b05e6 [MIPS] Fix vectored interrupt support in TLB exception handler generator. by Ralf Baechle · 19 years ago
  27. 6fd11a2 [MIPS] Cleanup free_initmem the same way as i386 did. by Ralf Baechle · 19 years ago
  28. 22a9835 [PATCH] unify PFN_* macros by Dave Hansen · 19 years ago
  29. 53b3531 [PATCH] s/;;/;/g by Alexey Dobriyan · 19 years ago
  30. 7835e98 [PATCH] remove set_page_count() outside mm/ by Nick Piggin · 19 years ago
  31. 8dfcc9b [PATCH] mm: split highorder pages by Nick Piggin · 19 years ago
  32. de862b4 [MIPS] TX49XX has prefetch. by Atsushi Nemoto · 19 years ago
  33. c6281ed [MIPS] Kill tlb-andes.c. by Thiemo Seufer · 19 years ago
  34. a3dddd5 [MIPS] War on whitespace: cleanup initial spaces followed by tabs. by Ralf Baechle · 19 years ago
  35. 8145095 [MIPS] Remove CONFIG_BUILD_ELF64. by Ralf Baechle · 19 years ago
  36. 37caa93 [MIPS] sc-rm7k.c cleanup by Atsushi Nemoto · 19 years ago
  37. de62893 [MIPS] local_r4k_flush_cache_page fix by Atsushi Nemoto · 19 years ago
  38. 1443e48 [MIPS] Scatter a bunch of __init over tlbex.c. by Ralf Baechle · 19 years ago
  39. 4debe4f [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs. by Ralf Baechle · 19 years ago
  40. 51939fb [MIPS] Sibyte: #if CONFIG_* doesn't fly. by Ralf Baechle · 19 years ago
  41. 41700e7 [MIPS] Add protected_blast_icache_range, blast_icache_range, etc. by Atsushi Nemoto · 19 years ago
  42. 3d50375 [MIPS] Support /proc/kcore for MIPS by Daniel Jacobowitz · 20 years ago
  43. d4264f1 [MIPS] Remove wrong __user tags. by Atsushi Nemoto · 19 years ago
  44. e7958bb MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. by Ralf Baechle · 19 years ago
  45. 68352e6 [PATCH] mips: setup_zero_pages count 1 by Hugh Dickins · 19 years ago
  46. d981733 [MIPS] Use reset_page_mapcount to initialize empty_zero_page usage counter. by Ralf Baechle · 19 years ago
  47. 872fec1 [PATCH] mm: init_mm without ptlock by Hugh Dickins · 19 years ago
  48. a4b5bd9 SB1 cache exception handling. by Andrew Isaacson · 19 years ago
  49. 93ce2f52 Add support for SB1A CPU. by Andrew Isaacson · 19 years ago
  50. 750ccf6 Fix zero length sys_cacheflush by Atsushi Nemoto · 19 years ago
  51. 6ec2580 Rename page argument of flush_cache_page to something more descriptive. by Ralf Baechle · 19 years ago
  52. dbc5716 Fix wrong comment. by Ralf Baechle · 19 years ago
  53. ec917c2c Fixup a few lose ends in explicit support for MIPS R1/R2. by Ralf Baechle · 19 years ago
  54. 65f1f5a Don't copy SB1 cache error handler to uncached memory. by Ralf Baechle · 19 years ago
  55. 46dc3a4 Fix stale comment in c-sb1.c. by Andrew Isaacson · 19 years ago
  56. 02cf211 Cleanup the mess in cpu_cache_init. by Ralf Baechle · 19 years ago
  57. f5cfa98 Use R4000 TLB routines for SB1 also. by Ralf Baechle · 19 years ago
  58. 9043f7e Sync c-tx39.c with c-r4k.c. by Atsushi Nemoto · 19 years ago
  59. 10a3dab Add/Fix missing bit of R4600 hit cacheop workaround. by Thiemo Seufer · 19 years ago
  60. 02fe2c9 Minor code cleanup. by Thiemo Seufer · 19 years ago
  61. f5b4d95 R4600 v2.0 needs a nop before tlbp. by Thiemo Seufer · 19 years ago
  62. 424cada Don't set up a sg dma address if we have no page address for some reason. by Thiemo Seufer · 19 years ago
  63. d8748a3 More .set push/pop. by Thiemo Seufer · 19 years ago
  64. 330cfe0 Let r4600 PRID detection match only legacy CPUs, cleanups. by Thiemo Seufer · 19 years ago
  65. 7623deb Handle mtc0 - tlb write hazard for VR5432. by Ralf Baechle · 19 years ago
  66. 1d40cfc Avoid SMP cacheflushes. This is a minor optimization of startup but by Ralf Baechle · 19 years ago
  67. bdf21b1 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. by Pete Popov · 19 years ago
  68. e01402b More AP / SP bits for the 34K, the Malta bits and things. Still wants by Ralf Baechle · 19 years ago
  69. ec74e36 Mark a few variables __read_mostly. by Ralf Baechle · 19 years ago
  70. cc61c1f MIPS R2 instruction hazard handling. by Ralf Baechle · 19 years ago
  71. bbc7f22 Detect the 34K. by Ralf Baechle · 19 years ago
  72. 6008026 Define kmap_atomic_pfn() for MIPS. by Ralf Baechle · 19 years ago
  73. 3ef33e6 Date: Fri Jul 8 20:10:17 2005 +0000 by Ralf Baechle · 19 years ago
  74. 6e760c8 Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. by Ralf Baechle · 19 years ago
  75. 2c93e12 Avoid tlbw* hazards for the R4600/R4700/R5000. by Maciej W. Rozycki · 19 years ago
  76. c3455b0 Inline ioremap() calls for constant addresses that map to KSEG1. by Maciej W. Rozycki · 19 years ago
  77. 4c0a2d4 Fix the diagnostic dump for the XTLB refill handler. by Maciej W. Rozycki · 19 years ago
  78. 41986a6 Fix a diagnostic message. by Maciej W. Rozycki · 19 years ago
  79. c6ad7b7 Use macros for the RM7k cp0.config bits instead of magic numbers. by Maciej W. Rozycki · 19 years ago
  80. fded2e5 Optimize R3k TLB Load/Store/Modified handlers, by scheduling by Maciej W. Rozycki · 19 years ago
  81. d925c26 Fill R3k load delay slots properly. by Maciej W. Rozycki · 19 years ago
  82. 9678e28 Only dump instructions actually emitted. by Maciej W. Rozycki · 19 years ago
  83. 63b2d2f Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs. by Thiemo Seufer · 20 years ago
  84. ba5187d Better interface to run uncached cache setup code. by Thiemo Seufer · 20 years ago
  85. 1342f7e Arrested for multiple offences of header file inclusion. by Ralf Baechle · 20 years ago
  86. 172546b Fix race conditions for read_c0_entryhi. Remove broken ASID masks in by Thiemo Seufer · 20 years ago
  87. 202d038 Remove useless casts. Fix formatting. by Maciej W. Rozycki · 20 years ago
  88. 1b3a6e9 Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMP by Thiemo Seufer · 20 years ago
  89. 6cbe063 R4300 delay slot. by Ralf Baechle · 20 years ago
  90. 53de0d4 Reformat; cosmetic cleanups. by Ralf Baechle · 20 years ago
  91. 9ff77c4 Export shm_align_mask and flush_data_cache_page. by Ralf Baechle · 20 years ago
  92. 77c728c Gcc 4.0 fixes. by Ralf Baechle · 20 years ago
  93. fe00f94 Sparseify MIPS. by Ralf Baechle · 20 years ago
  94. e3ad1c2 Base Au1200 2.6 support. by Pete Popov · 20 years ago
  95. 685f779 Fix initialization. Unbreak the wait-for-completion loops. Code cleanup. by Thiemo Seufer · 20 years ago
  96. 65bda1a Switch SiByte drivers back to __raw_*() functions. by Maciej W. Rozycki · 20 years ago
  97. 16033d6 Handle addresses beyond VMALLOC_END correctly. by Thiemo Seufer · 20 years ago
  98. 26a51b2 Use intermediate variable. by Thiemo Seufer · 20 years ago
  99. 79acf83 Moves a test which determines if we actually need to perform a by Ralf Baechle · 20 years ago
  100. c6e8b58 Update MIPS to use the 4-level pagetable code thereby getting rid of by Ralf Baechle · 20 years ago