1. f533da1 drm/nouveau: use pr_cont by Marcin Slusarz · 12 years ago
  2. edc260d drm/nouveau/fifo: trigger engine context unload before zeroing context pointer by Ben Skeggs · 12 years ago
  3. ae4ba73 drm/nouveau: raise reporting levels of some messages by Marcin Slusarz · 12 years ago
  4. 507ceb1 drm/nouveau/core: fix the assumption that NVDEV_XXXX is always under 32 by Martin Peres · 12 years ago
  5. 23c14ed nvc0/bsp: initial implementation of engine by Maarten Lankhorst · 12 years ago
  6. b3ccd34 drm/nvc0/fifo: re-bash PBUS regs after vm-fault to BARs/PEEPHOLE by Ben Skeggs · 12 years ago
  7. e662625 drm/nouveau: constify instances of nouveau_bitfield and nouveau_enum structs by Marcin Slusarz · 12 years ago
  8. c97f8c9 drm/nouveau/fifo: use defines instead of hardcoded class ids by Ben Skeggs · 12 years ago
  9. 4c2d422 drm/nouveau/core: have fifo store a unique context identifier at attach time by Ben Skeggs · 12 years ago
  10. dbff2de drm/nve0/fifo: support engine selection when creating fifo channels by Ben Skeggs · 12 years ago
  11. ebb945a drm/nouveau: port all engines to new engine module format by Ben Skeggs · 12 years ago
  12. f589be8 drm/nouveau/pageflip: kick flip handling out of engsw and into fence by Ben Skeggs · 12 years ago
  13. 3863c9b drm/nouveau/instmem: completely new implementation, as a subdev module by Ben Skeggs · 12 years ago
  14. 18c9b95 drm/nouveau/gpuobj: create wrapper functions for mapping gpuobj into vm/bar by Ben Skeggs · 12 years ago
  15. 9da226f drm/nvc0/fifo: handle bar1 control regs much like fifo/nve0 by Ben Skeggs · 12 years ago
  16. 02a841d drm/nouveau: restructure source tree, split core from drm implementation by Ben Skeggs · 12 years ago[Renamed (98%) from drivers/gpu/drm/nouveau/nvc0_fifo.c]
  17. 833dd82 drm/nvc0/fifo: ignore bits in PFIFO_INTR that aren't set in PFIFO_INTR_EN by Ben Skeggs · 12 years ago
  18. c420b2d drm/nouveau/fifo: turn all fifo modules into engine modules by Ben Skeggs · 12 years ago
  19. 67b342e drm/nouveau/fifo: remove all the "special" engine hooks by Ben Skeggs · 12 years ago
  20. 20abd16 drm/nouveau: create real execution engine for software object class by Ben Skeggs · 12 years ago
  21. d5316e2 drm/nvc0-/disp: reimplement flip completion method as fifo method by Ben Skeggs · 12 years ago
  22. 3dcbb02 drm/nvc0/fifo: avoid touching missing subfifos by Ben Skeggs · 13 years ago
  23. 068da16 drm/nvc0/fifo: fix typos in unload_context by Ben Skeggs · 13 years ago
  24. 1233bd8 drm/nvc0/fifo: stick user area into a gpuobj rather than a bo by Ben Skeggs · 13 years ago
  25. 0638df4 drm/nvc0/fifo: restore context table on resume by Ben Skeggs · 13 years ago
  26. 7a5c23d drm/nvc0/fifo: kick channels off during suspend by Ben Skeggs · 13 years ago
  27. 7795bee drm/nvc0: decode gpc/hubclient on vm fault by Ben Skeggs · 13 years ago
  28. e296663 drm/nvc0: more vm fault reasons by Ben Skeggs · 13 years ago
  29. 7a31347 drm/nvc0: more vm fault engines by Ben Skeggs · 13 years ago
  30. d550c41 drm/nouveau: remove no_vm/mappable flags from nouveau_bo by Ben Skeggs · 13 years ago
  31. cc8cd64 drm/nvc0/pfifo: semi-handle a couple more irqs by Ben Skeggs · 14 years ago
  32. ec9c088 drm/nvc0/pfifo: support for chipsets with only one PSUBFIFO (0xc1) by Ben Skeggs · 14 years ago
  33. b2b0993 drm/nvc0: implement pfifo engine hooks by Ben Skeggs · 14 years ago
  34. 9f56b12 drm/nouveau: Simplify tile region handling. by Francisco Jerez · 14 years ago
  35. 4b223ee drm/nvc0: starting point for GF100 support, everything stubbed by Ben Skeggs · 14 years ago