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gerrit-public.fairphone.software / kernel / msm-4.9 / refs/tags/FP3-REL-Q-3.A.0107 / arch / sh / include / cpu-sh4 / cpu / mmu_context.h
  1. 99dc5c0 sh: Disable MMUCR_AT for SH-4 nommu. by Paul Mundt · 14 years ago
  2. 6ae6650 sh: tlb debugfs support. by Matt Fleming · 14 years ago
  3. 4539282 sh: update the TLB replacement counter for entry wiring. by Matt Fleming · 14 years ago
  4. a9eb4f6 sh: Flush ITLB too in PTEAEX's flush_tlb_page() by Matt Fleming · 14 years ago
  5. 8eda551 sh: New extended page flag to wire/unwire TLB entries by Matt Fleming · 15 years ago
  6. 8263a67 sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores. by Paul Mundt · 15 years ago
  7. f15cbe6 sh: migrate to arch/sh/include/ by Paul Mundt · 16 years ago[Renamed from include/asm-sh/cpu-sh4/mmu_context.h]
  8. d02b08f sh: Clean up places that make 29-bit physical assumptions. by Stuart Menefy · 17 years ago
  9. eddeeb3 sh: Invalidate the TLB after applying PMB mappings. by Stuart Menefy · 17 years ago
  10. d04a0f7 sh: Fix up extended mode TLB for SH-X2+ cores. by Paul Mundt · 17 years ago
  11. 091904a [PATCH] sh: Move TRA/EXPEVT/INTEVT definitions for reuse by Paul Mundt · 18 years ago
  12. 1da177e Linux-2.6.12-rc2 by Linus Torvalds · 19 years ago