| commit | 0af18c5cc9403999bb189f825b816f7fc80fc0ee | [log] [tgz] |
|---|---|---|
| author | Stephen Warren <swarren@nvidia.com> | Mon Mar 04 17:10:20 2013 -0700 |
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Tue Mar 05 10:42:11 2013 +0800 |
| tree | ec65734228968d4948dd50b9551aaea799058558 | |
| parent | 6dbe51c251a327e012439c4772097a13df43c5b8 [diff] |
ASoC: tegra: fix I2S bit count mask This register field is 11 bits wide, not 15 bits wide. Given the way this value is currently, used, this patch has no practical effect. However, it's still best if the value is correct. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>