Blackfin: SMP: make core timers per-cpu clock events for HRT
SMP systems require per-cpu local clock event devices in order to enable
HRT support. One a BF561, we can use local core timer for this purpose.
Originally, there was one global core-timer clock event device set up for
core A.
To accomplish this feat, we need to split the gptimer0/core timer logic
so that each is a standalone clock event. There is no requirement that
we only have one clock event source anyways. Once we have this, we just
define per-cpu clock event devices for each local core timer.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index eddb720..b343ab3 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -365,9 +365,6 @@
static void __cpuinit setup_secondary(unsigned int cpu)
{
-#if !defined(CONFIG_TICKSOURCE_GPTMR0)
- struct irq_desc *timer_desc;
-#endif
unsigned long ilat;
bfin_write_IMASK(0);
@@ -382,17 +379,6 @@
bfin_irq_flags |= IMASK_IVG15 |
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
-
-#if defined(CONFIG_TICKSOURCE_GPTMR0)
- /* Power down the core timer, just to play safe. */
- bfin_write_TCNTL(0);
-
- /* system timer0 has been setup by CoreA. */
-#else
- timer_desc = irq_desc + IRQ_CORETMR;
- setup_core_timer();
- timer_desc->chip->enable(IRQ_CORETMR);
-#endif
}
void __cpuinit secondary_start_kernel(void)
@@ -435,6 +421,9 @@
platform_secondary_init(cpu);
+ /* setup local core timer */
+ bfin_local_timer_setup();
+
local_irq_enable();
/*