commit | 0e3d4373b8a7757a8f5187f5cabafb6aceff469b | [log] [tgz] |
---|---|---|
author | Minghuan Lian <Minghuan.Lian@freescale.com> | Wed Jul 31 10:59:07 2013 +0800 |
committer | Scott Wood <scottwood@freescale.com> | Mon Oct 28 21:11:14 2013 -0500 |
tree | 74108e69667ae0866e066fc63f86f9d10b039793 | |
parent | 682775b8de995d97956447730c04d2ff978d4e13 [diff] |
powerpc/dts: fix sRIO error interrupt for b4860 For B4 platform, MPIC EISR register is in reversed bitmap order, instead of "Error interrupt source 0-31. Bit 0 represents SRC0." the correct ordering is "Error interrupt source 0-31. Bit 0 represents SRC31." This patch is to fix sRIO EISR bit value of error interrupt in dts node. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>