MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.
It was ugly.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 0644c98..c75025f 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -20,11 +20,7 @@
#define Index_Load_Tag_D 0x05
#define Index_Store_Tag_I 0x08
#define Index_Store_Tag_D 0x09
-#if defined(CONFIG_CPU_LOONGSON2)
-#define Hit_Invalidate_I 0x00
-#else
#define Hit_Invalidate_I 0x10
-#endif
#define Hit_Invalidate_D 0x11
#define Hit_Writeback_Inv_D 0x15
@@ -84,4 +80,9 @@
#define Index_Store_Data_D 0x1d
#define Index_Store_Data_S 0x1f
+/*
+ * Loongson2-specific cacheops
+ */
+#define Hit_Invalidate_I_Loongson23 0x00
+
#endif /* __ASM_CACHEOPS_H */