[MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index d15b047..461cf01 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -213,7 +213,7 @@
if ( NULL != p )
{
memcpy(p, dev, sizeof(dbdev_tab_t));
- p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
+ p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id);
ret = p->dev_id;
new_id++;
#if 0
@@ -671,7 +671,7 @@
* parts. If it is fixedin the future, these dma_cache_inv will just
* be nothing more than empty macros. See io.h.
* */
- dma_cache_inv((unsigned long)buf,nbytes);
+ dma_cache_inv((unsigned long)buf, nbytes);
dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
au_sync();
dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 0a50af7..79e0b0a 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -53,7 +53,7 @@
/* memory-mapped read/write of the port */
#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
-#define UART16550_WRITE(y,z) (au_writel(z&0xff, DEBUG_BASE + y))
+#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
extern unsigned long get_au1x00_uart_baud_base(void);
extern unsigned long cal_r4koff(void);
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index 3901e8e..6f57f72 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -211,7 +211,7 @@
unsigned long wakeup, flags;
extern void save_and_sleep(void);
- spin_lock_irqsave(&pm_lock,flags);
+ spin_lock_irqsave(&pm_lock, flags);
save_core_regs();
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index b73b2d1..7c708db 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -132,7 +132,7 @@
pb1200_disable_irq(irq_nr);
if (--pb1200_cascade_en == 0)
{
- free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
+ free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
}
return;
}