tree 1c6ec1a5a2eda821901245977d39c8ce775db50e
parent 55bb6a633c33caf68ab470907ecf945289cb733d
author Elaine Zhang <zhangqing@rock-chips.com> 1493710446 +0800
committer Heiko Stuebner <heiko@sntech.de> 1496411852 +0200

clk: rockchip: mark some special clk as critical on rk3368

The jtag clk no driver to handle them.
But this clk need enable,so make it as critical.

The ddrphy/ddrupctl clks no driver to handle them,
Chip design requirements for these clock to always on,

The pmu_hclk_otg0 is Chip design defect, must be always on,

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>