tree 805de041dfc84ae9ca767c9767d833977654dbe0
parent eb3436a0139a651a39dbb37a75b10a2cccd00ad5
author Kumar Gala <galak@kernel.crashing.org> 1237434941 +0000
committer Benjamin Herrenschmidt <benh@kernel.crashing.org> 1237862852 +1100

powerpc/mm: e300c2/c3/c4 TLB errata workaround

Complete workaround for DTLB errata in e300c2/c3/c4 processors.

Due to the bug, the hardware-implemented LRU algorythm always goes to way
1 of the TLB. This fix implements the proposed software workaround in
form of a LRW table for chosing the TLB-way.

Based on patch from David Jander <david@protonic.nl>

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>