tree e91adedcd99c0700c64e53bc4fa72117e7ade8ef
parent d1313e7896e932a92e21912850ef034e58571b66
author Thierry Reding <treding@nvidia.com> 1415373041 +0100
committer Thierry Reding <treding@nvidia.com> 1430736863 +0200

memory: tegra: Add Tegra132 support

The memory controller on Tegra132 is very similar to the one found on
Tegra124. But the Denver CPUs don't have an outer cache, so dcache
maintenance is done slightly differently.

Signed-off-by: Thierry Reding <treding@nvidia.com>