tree 773b650db52f0b688ea865bdd070a22ab70f7e55
parent 164691aae88d7fb75c1b2a3e83737b2a52c2f956
author Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> 1543421908 +0100
committer Ulf Hansson <ulf.hansson@linaro.org> 1545031584 +0100

mmc: renesas_sdhi: align compatibility properties for H3 and M3-W

It was though all ES revisions of H3 and M3-W SoCs required the
TMIO_MMC_HAVE_4TAP_HS400 flag. Recent datasheet updates tells us this is
not true, only early ES revisions of the SoC do.

Since quirk matching based on ES revisions is now used to handle the
flag it's possible to align all Gen3 compatibility properties. This will
allow later ES revisions of H3 and M3-W to use the correct 8-tap HS400
mode.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>