commit 2cc0c0b5cd4d07a65267c28a4f7b68134abff472
author Flora Cui <Flora.Cui@amd.com> Mon Mar 14 18:33:29 2016 -0400
committer Alex Deucher <alexander.deucher@amd.com> Wed May 04 20:27:57 2016 -0400
tree 6f989d1e7fb5706e171c08881720ba8da8734bfc
parent a3ad7a9ad8ef2e87ffa7e65d6ce0e9928b4134e9

drm/amdgpu: change ELM/BAF to Polaris10/Polaris11

Adjust to preferred code names.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/include/atombios.h

diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
index 296def3..32f3e34 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -2061,7 +2061,7 @@
 #define SET_DCE_CLOCK_FLAG_DPREFCLK_BYPASS         0x01
 #define SET_DCE_CLOCK_FLAG_ENABLE_PIXCLK           0x02
 
-// SetDCEClockTable input parameter for DCE11.2( ELM and BF ) and above
+// SetDCEClockTable input parameter for DCE11.2( POLARIS10 and POLARIS11 ) and above
 typedef struct _SET_DCE_CLOCK_PARAMETERS_V2_1
 {
   ULONG  ulDCEClkFreq;                               // target DCE frequency in unit of 10KHZ, return real DISPCLK/DPREFCLK frequency.
@@ -5494,7 +5494,7 @@
   ULONG ulReserved[8];            // Reserved for future ASIC
 }ATOM_ASIC_PROFILING_INFO_V3_4;
 
-// for Ellemser/Baffin speed EVV algorithm
+// for  Polaris10/Polaris11 speed EVV algorithm
 typedef struct  _ATOM_ASIC_PROFILING_INFO_V3_5
 {
   ATOM_COMMON_TABLE_HEADER         asHeader;
@@ -5549,7 +5549,7 @@
 }ATOM_SCLK_FCW_RANGE_ENTRY_V1;
 
 
-// SMU_InfoTable for Ellesmere/Baffin
+// SMU_InfoTable for  Polaris10/Polaris11
 typedef struct  _ATOM_SMU_INFO_V2_1
 {
   ATOM_COMMON_TABLE_HEADER         asHeader;