tree 8a2a04aae10c5fc208e430e7fa4a457190fcfc03
parent ac2527bfc21739b77d687df1bfc4e973103fef7b
author Joseph Lo <josephl@nvidia.com> 1372845039 +0800
committer Stephen Warren <swarren@nvidia.com> 1374250085 -0600

ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15

When there is a cluster power down cycle in suspend, we need to set up
the correct L2 RAM data RAM latency to make L2 cache work correctly. This
is only needed for cluster 0 and needs to be done in tegra_resume before
the cache is enabled.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>