| commit | 30a0fb947a68ad3ab8a7184e3b3d79dce10e3688 | [log] [tgz] |
|---|---|---|
| author | H. Peter Anvin <hpa@zytor.com> | Mon Jan 26 09:40:58 2009 -0800 |
| committer | H. Peter Anvin <hpa@zytor.com> | Mon Jan 26 09:40:58 2009 -0800 |
| tree | 1c2d4059264b71b36d00dcc96c333a47e28ae18a | |
| parent | e88a0faae5baaaa3bdc6f23a55ad6bc7a7b4aa77 [diff] |
x86: correct the CPUID pattern for MSR_IA32_MISC_ENABLE availability Impact: re-enable CPUID unmasking on affected processors As far as I am capable of discerning from the documentation, MSR_IA32_MISC_ENABLE should be available for all family 0xf CPUs, as well as family 6 for model >= 0xd (newer Pentium M). The documentation on this isn't ideal, so we need to be on the lookout for errors, still. Signed-off-by: H. Peter Anvin <hpa@zytor.com>