commit 313ce674d3cbc2d48ed34a9462427920ac54f4ad
author Chris Metcalf <cmetcalf@tilera.com> Mon May 02 14:50:06 2011 -0400
committer Chris Metcalf <cmetcalf@tilera.com> Mon May 02 18:53:35 2011 -0400
tree 7478150a1268c79851f1a366158c59606330e700
parent 93013a0f533fb3dd6875ca670d8e0bb4166a796e

arch/tile: support TIF_NOTIFY_RESUME

This support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc.
The change is slightly more complex than the minimal thing, since
I took advantage of having to go into the assembly code to just
move a bunch of stuff into C code: specifically, the schedule(),
do_async_page_fault(), do_signal(), and single_step_once() support,
in addition to the TIF_NOTIFY_RESUME support.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

arch/tile/mm/fault.c

diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index 51f8663..24ca54a 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -732,6 +732,7 @@
 		panic("Bad fault number %d in do_page_fault", fault_num);
 	}
 
+#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
 	if (EX1_PL(regs->ex1) != USER_PL) {
 		struct async_tlb *async;
 		switch (fault_num) {
@@ -775,6 +776,7 @@
 			return;
 		}
 	}
+#endif
 
 	handle_page_fault(regs, fault_num, is_page_fault, address, write);
 }
@@ -801,8 +803,6 @@
 				  async->address, async->is_write);
 	}
 }
-#endif /* CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC() */
-
 
 /*
  * This routine effectively re-issues asynchronous page faults
@@ -824,6 +824,8 @@
 	handle_async_page_fault(regs, &current->thread.sn_async_tlb);
 #endif
 }
+#endif /* CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC() */
+
 
 void vmalloc_sync_all(void)
 {