drm/i915/chv: Add basic PM interrupt support for CHV
Enabled PM interrupt programming for CHV. Re-using gen8 code and extending same for CHV.
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ec777a..58a03f8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3392,6 +3392,8 @@
struct drm_i915_private *dev_priv = dev->dev_private;
I915_WRITE(GEN6_RC_CONTROL, 0);
+
+ gen8_disable_rps_interrupts(dev);
}
static void valleyview_disable_rps(struct drm_device *dev)
@@ -4109,6 +4111,8 @@
valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);
+ gen8_enable_rps_interrupts(dev);
+
gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
}