commit | f975ca46f634660a52d8c815b465258ae9bce3b7 | [log] [tgz] |
---|---|---|
author | Nicolin Chen <Guangyu.Chen@freescale.com> | Tue May 06 16:56:01 2014 +0800 |
committer | Mark Brown <broonie@linaro.org> | Mon May 12 23:15:25 2014 +0100 |
tree | 781c34ceec8d6463c57f59f8305db607eaca9f0f | |
parent | 3e185238a37d1f0a37a1d910344cdcff578bf333 [diff] |
ASoC: fsl_esai: Bypass divider settings if clock requirement is not changed We don't need to change those dividers if bclk and mclk remains the same directions and values. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>