| commit | 3cf467a9969db8297dcf783c5b09b0df8fda863b | [log] [tgz] |
|---|---|---|
| author | J Keerthy <j-keerthy@ti.com> | Tue Jul 23 12:05:37 2013 +0530 |
| committer | Mike Turquette <mturquette@linaro.org> | Fri Jan 17 12:35:31 2014 -0800 |
| tree | bc17da1cc3f192ade4e939e0ae1193a9a66a0bb0 | |
| parent | 62125a46cd717ad8fa6a64d260d46a0a108e6222 [diff] |
CLK: TI: DRA7: Add APLL support The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>