tree 1bb319f5bc907e75bf8b4d179ce1b30053b09a58
parent 8e56133e5c7b7a7a97f6a92d92f664d5ecd30745
author Scott Wood <oss@buserror.net> 1489977442 +0800
committer Stephen Boyd <sboyd@codeaurora.org> 1496305450 -0700

dt-bindings: qoriq-clock: Add coreclk

ls1012a has separate input root clocks for core PLLs versus the platform
PLL, with the latter described as sysclk in the hw docs.
Update the qoriq-clock binding to allow a second input clock, named
"coreclk".  If present, this clock will be used for the core PLLs.

Signed-off-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>