[POWERPC] Fix sparse warning in xmon Cell code

My patch to add spu helpers to xmon (a898497088f46252e6750405504064e2dce53117)
introduced a few sparse warnings, because I was dereferencing an __iomem
pointer.

I think the best way to handle it is to actually use the appropriate in_beXX
functions. Need to rejigger the DUMP macro a little to accomodate that.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index d66c3a1..6b9d720 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2748,13 +2748,13 @@
 }
 
 #define DUMP_WIDTH	23
-#define DUMP_FIELD(obj, format, field)					\
+#define DUMP_VALUE(format, field, value)				\
 do {									\
 	if (setjmp(bus_error_jmp) == 0) {				\
 		catch_memory_errors = 1;				\
 		sync();							\
 		printf("  %-*s = "format"\n", DUMP_WIDTH,		\
-				#field, obj->field);			\
+				#field, value);				\
 		sync();							\
 		__delay(200);						\
 	} else {							\
@@ -2765,6 +2765,9 @@
 	catch_memory_errors = 0;					\
 } while (0)
 
+#define DUMP_FIELD(obj, format, field)	\
+	DUMP_VALUE(format, field, obj->field)
+
 static void dump_spu_fields(struct spu *spu)
 {
 	printf("Dumping spu fields at address %p:\n", spu);
@@ -2793,13 +2796,18 @@
 	DUMP_FIELD(spu, "0x%p", timestamp);
 	DUMP_FIELD(spu, "0x%lx", problem_phys);
 	DUMP_FIELD(spu, "0x%p", problem);
-	DUMP_FIELD(spu, "0x%x", problem->spu_runcntl_RW);
-	DUMP_FIELD(spu, "0x%x", problem->spu_status_R);
-	DUMP_FIELD(spu, "0x%x", problem->spu_npc_RW);
+	DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
+			in_be32(&spu->problem->spu_runcntl_RW));
+	DUMP_VALUE("0x%x", problem->spu_status_R,
+			in_be32(&spu->problem->spu_status_R));
+	DUMP_VALUE("0x%x", problem->spu_npc_RW,
+			in_be32(&spu->problem->spu_npc_RW));
 	DUMP_FIELD(spu, "0x%p", priv1);
 
-	if (spu->priv1)
-		DUMP_FIELD(spu, "0x%lx", priv1->mfc_sr1_RW);
+	if (spu->priv1) {
+		DUMP_VALUE("0x%lx", priv1->mfc_sr1_RW,
+				in_be64(&spu->priv1->mfc_sr1_RW));
+	}
 
 	DUMP_FIELD(spu, "0x%p", priv2);
 }