Merge branch 'board-specific' of git://github.com/hzhuang1/linux into next/boards
* 'board-specific' of git://github.com/hzhuang1/linux:
ARM: pxa: hx4700: Add Synaptics NavPoint touchpad
ARM: pxa: Use REGULATOR_SUPPLY macro
diff --git a/Documentation/devicetree/bindings/mtd/orion-nand.txt b/Documentation/devicetree/bindings/mtd/orion-nand.txt
new file mode 100644
index 0000000..b2356b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/orion-nand.txt
@@ -0,0 +1,50 @@
+NAND support for Marvell Orion SoC platforms
+
+Required properties:
+- compatible : "mrvl,orion-nand".
+- reg : Base physical address of the NAND and length of memory mapped
+ region
+
+Optional properties:
+- cle : Address line number connected to CLE. Default is 0
+- ale : Address line number connected to ALE. Default is 1
+- bank-width : Width in bytes of the device. Default is 1
+- chip-delay : Chip dependent delay for transferring data from array to read
+ registers in usecs
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+nand@f4000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cle = <0>;
+ ale = <1>;
+ bank-width = <1>;
+ chip-delay = <25>;
+ compatible = "mrvl,orion-nand";
+ reg = <0xf4000000 0x400>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "uImage";
+ reg = <0x0100000 0x200000>;
+ };
+
+ partition@300000 {
+ label = "dtb";
+ reg = <0x0300000 0x100000>;
+ };
+
+ partition@400000 {
+ label = "root";
+ reg = <0x0400000 0x7d00000>;
+ };
+};
diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts
new file mode 100644
index 0000000..dc09a73
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-dns320.dts
@@ -0,0 +1,64 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+ model = "D-Link DNS-320 NAS (Rev A1)";
+ compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x8000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ ocp@f1000000 {
+ serial@12000 {
+ clock-frequency = <166666667>;
+ status = "okay";
+ };
+
+ serial@12100 {
+ clock-frequency = <166666667>;
+ status = "okay";
+ };
+
+ nand@3000000 {
+ status = "okay";
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "uImage";
+ reg = <0x0100000 0x500000>;
+ };
+
+ partition@600000 {
+ label = "ramdisk";
+ reg = <0x0600000 0x500000>;
+ };
+
+ partition@b00000 {
+ label = "image";
+ reg = <0x0b00000 0x6600000>;
+ };
+
+ partition@7100000 {
+ label = "mini firmware";
+ reg = <0x7100000 0xa00000>;
+ };
+
+ partition@7b00000 {
+ label = "config";
+ reg = <0x7b00000 0x500000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts
new file mode 100644
index 0000000..c2a5562
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-dns325.dts
@@ -0,0 +1,59 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+ model = "D-Link DNS-325 NAS (Rev A1)";
+ compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ ocp@f1000000 {
+ serial@12000 {
+ clock-frequency = <200000000>;
+ status = "okay";
+ };
+
+ nand@3000000 {
+ status = "okay";
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0000000 0x100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "uImage";
+ reg = <0x0100000 0x500000>;
+ };
+
+ partition@600000 {
+ label = "ramdisk";
+ reg = <0x0600000 0x500000>;
+ };
+
+ partition@b00000 {
+ label = "image";
+ reg = <0x0b00000 0x6600000>;
+ };
+
+ partition@7100000 {
+ label = "mini firmware";
+ reg = <0x7100000 0xa00000>;
+ };
+
+ partition@7b00000 {
+ label = "config";
+ reg = <0x7b00000 0x500000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
new file mode 100644
index 0000000..ada0f0c
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -0,0 +1,44 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+ model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
+ compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ ocp@f1000000 {
+ serial@12000 {
+ clock-frequency = <200000000>;
+ status = "okay";
+ };
+
+ nand@3000000 {
+ status = "okay";
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0000000 0x100000>;
+ };
+
+ partition@100000 {
+ label = "uImage";
+ reg = <0x0100000 0x600000>;
+ };
+
+ partition@700000 {
+ label = "root";
+ reg = <0x0700000 0xf900000>;
+ };
+
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
new file mode 100644
index 0000000..1ba75d4
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -0,0 +1,26 @@
+/dts-v1/;
+
+/include/ "kirkwood.dtsi"
+
+/ {
+ model = "Iomega Iconnect";
+ compatible = "iom,iconnect-1.1", "iom,iconnect", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk mtdparts=orion_nand:0xc0000@0x0(uboot),0x20000@0xa0000(env),0x300000@0x100000(zImage),0x300000@0x540000(initrd),0x1f400000@0x980000(boot)";
+ linux,initrd-start = <0x4500040>;
+ linux,initrd-end = <0x4800000>;
+ };
+
+ ocp@f1000000 {
+ serial@12000 {
+ clock-frequency = <200000000>;
+ status = "ok";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 3474ef89..926528b 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -5,7 +5,7 @@
ocp@f1000000 {
compatible = "simple-bus";
- ranges = <0 0xf1000000 0x1000000>;
+ ranges = <0 0xf1000000 0x4000000>;
#address-cells = <1>;
#size-cells = <1>;
@@ -32,5 +32,18 @@
reg = <0x10300 0x20>;
interrupts = <53>;
};
+
+ nand@3000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cle = <0>;
+ ale = <1>;
+ bank-width = <1>;
+ compatible = "mrvl,orion-nand";
+ reg = <0x3000000 0x400>;
+ chip-delay = <25>;
+ /* set partition map and/or chip-delay in board dts */
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
new file mode 100644
index 0000000..a7505a9
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -0,0 +1,22 @@
+/*
+ * Device Tree Source for the armadillo 800 eva board
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "armadillo 800 eva";
+ compatible = "renesas,armadillo800eva";
+
+ memory {
+ device_type = "memory";
+ reg = <0x40000000 0x20000000>;
+ };
+};
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
new file mode 100644
index 0000000..677fc60
--- /dev/null
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -0,0 +1,21 @@
+/*
+ * Device Tree Source for the sh7372 SoC
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "renesas,sh7372";
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a8";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
new file mode 100644
index 0000000..bcb9119
--- /dev/null
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -0,0 +1,22 @@
+/*
+ * Device Tree Source for the KZM-A9-GT board
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "KZM-A9-GT";
+ compatible = "renesas,kzm9g", "renesas,sh73a0";
+
+ memory {
+ device_type = "memory";
+ reg = <0x41000000 0x1e800000>;
+ };
+};
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
new file mode 100644
index 0000000..ddc9fe6
--- /dev/null
+++ b/arch/arm/configs/armadillo800eva_defconfig
@@ -0,0 +1,142 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_R8A7740=y
+CONFIG_MACH_ARMADILLO800EVA=y
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_ARM_THUMB is not set
+CONFIG_CPU_BPREDICT_DISABLE=y
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_ARM_ERRATA_430973=y
+CONFIG_ARM_ERRATA_458693=y
+CONFIG_ARM_ERRATA_460075=y
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_751472=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
+CONFIG_CMDLINE_FORCE=y
+CONFIG_KEXEC=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+CONFIG_SH_ETH=y
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ST1232=y
+# CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=8
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_HWMON is not set
+CONFIG_FB=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_SH_MOBILE_LCDC=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_SH4_FSI=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB=y
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_RENESAS_USBHS=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=y
+CONFIG_USB_ETH=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHI=y
+CONFIG_MMC_SH_MMCIF=y
+CONFIG_UIO=y
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_XZ_DEC=y
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 6b31cb6..09a0296 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -92,6 +92,7 @@
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_MC13783=m
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
@@ -107,7 +108,8 @@
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
-# CONFIG_HWMON is not set
+CONFIG_HWMON=m
+CONFIG_SENSORS_MC13783_ADC=m
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_MFD_MC13XXX=y
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
new file mode 100644
index 0000000..e3ebc20
--- /dev/null
+++ b/arch/arm/configs/kzm9g_defconfig
@@ -0,0 +1,139 @@
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+CONFIG_ARCH_SH73A0=y
+CONFIG_MACH_KZM9G=y
+CONFIG_MEMORY_START=0x41000000
+CONFIG_MEMORY_SIZE=0x1f000000
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+CONFIG_SCHED_MC=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200"
+CONFIG_KEXEC=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_IRDA=y
+CONFIG_SH_IRDA=y
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_SMSC911X=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_SPARSEKMAP=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ST1232=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=9
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_SH_MOBILE=y
+CONFIG_GPIO_PCF857X=y
+# CONFIG_HWMON is not set
+CONFIG_FB=y
+CONFIG_FB_SH_MOBILE_LCDC=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_FB_SH_MOBILE_MERAM=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_SH4_FSI=y
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_R8A66597_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_SDHI=y
+CONFIG_MMC_SH_MMCIF=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_SH_DMAE=y
+CONFIG_ASYNC_TX_DMA=y
+CONFIG_STAGING=y
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_FTRACE is not set
+# CONFIG_ARM_UNWIND is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRC16=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index d5f00d7..9854ff4 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -98,6 +98,7 @@
CONFIG_LIBERTAS_SDIO=m
CONFIG_LIBERTAS_DEBUG=y
CONFIG_USB_USBNET=y
+CONFIG_USB_NET_SMSC95XX=y
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
CONFIG_USB_EPSON2888=y
@@ -175,6 +176,7 @@
CONFIG_USB_DEVICEFS=y
CONFIG_USB_SUSPEND=y
CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_LIBUSUAL=y
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index b8df521..2808e47 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -200,6 +200,7 @@
select S3C_DEV_HSMMC2
select S3C_DEV_HSMMC3
select SAMSUNG_DEV_BACKLIGHT
+ select EXYNOS_DEV_DRM
select EXYNOS4_DEV_AHCI
select SAMSUNG_DEV_KEYPAD
select EXYNOS4_DEV_DMA
@@ -255,6 +256,7 @@
select S5P_DEV_ONENAND
select S5P_DEV_TV
select EXYNOS4_DEV_DMA
+ select EXYNOS_DEV_DRM
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
select EXYNOS4_SETUP_I2C3
@@ -291,6 +293,7 @@
select S5P_DEV_USB_EHCI
select S5P_SETUP_MIPIPHY
select EXYNOS4_DEV_DMA
+ select EXYNOS_DEV_DRM
select EXYNOS4_SETUP_FIMC
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_I2C1
@@ -325,6 +328,7 @@
select S5P_DEV_USB_EHCI
select SAMSUNG_DEV_BACKLIGHT
select SAMSUNG_DEV_PWM
+ select EXYNOS_DEV_DRM
select EXYNOS4_DEV_DMA
select EXYNOS4_DEV_USB_OHCI
select EXYNOS4_SETUP_FIMD0
@@ -345,6 +349,11 @@
select S3C_DEV_I2C7
select S3C_DEV_RTC
select S3C_DEV_WDT
+ select S5P_DEV_FIMC0
+ select S5P_DEV_FIMC1
+ select S5P_DEV_FIMC2
+ select S5P_DEV_FIMC3
+ select S5P_DEV_MFC
select SAMSUNG_DEV_BACKLIGHT
select SAMSUNG_DEV_KEYPAD
select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index ed90aef..0fcbb2e 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -25,6 +25,7 @@
#include <linux/mmc/host.h>
#include <linux/fb.h>
#include <linux/pwm_backlight.h>
+#include <drm/exynos_drm.h>
#include <video/platform_lcd.h>
#include <media/m5mols.h>
@@ -213,6 +214,29 @@
},
};
+#ifdef CONFIG_DRM_EXYNOS
+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
+ .panel = {
+ .timing = {
+ .xres = 1024,
+ .yres = 600,
+ .hsync_len = 40,
+ .left_margin = 79,
+ .right_margin = 200,
+ .vsync_len = 10,
+ .upper_margin = 10,
+ .lower_margin = 11,
+ .refresh = 60,
+ },
+ },
+ .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
+ VIDCON0_CLKSEL_LCD,
+ .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .default_win = 3,
+ .bpp = 32,
+};
+
+#else
/* Frame Buffer */
static struct s3c_fb_pd_win nuri_fb_win0 = {
.win_mode = {
@@ -239,6 +263,7 @@
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
};
+#endif
static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
{
@@ -1302,6 +1327,9 @@
&cam_vdda_fixed_rdev,
&cam_8m_12v_fixed_rdev,
&exynos4_bus_devfreq,
+#ifdef CONFIG_DRM_EXYNOS
+ &exynos_device_drm,
+#endif
};
static void __init nuri_map_io(void)
@@ -1334,7 +1362,12 @@
i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs));
s3c_i2c6_set_platdata(&nuri_i2c6_platdata);
+#ifdef CONFIG_DRM_EXYNOS
+ s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
+ exynos4_fimd0_gpio_setup_24bpp();
+#else
s5p_fimd0_set_platdata(&nuri_fb_pdata);
+#endif
nuri_camera_init();
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 878d4c9..fe96279 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -45,6 +45,7 @@
#include <mach/ohci.h>
#include <mach/map.h>
+#include <drm/exynos_drm.h>
#include "common.h"
/* Following are default values for UCON, ULCON and UFCON UART registers */
@@ -583,6 +584,27 @@
.dev.platform_data = &origen_lcd_hv070wsa_data,
};
+#ifdef CONFIG_DRM_EXYNOS
+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
+ .panel = {
+ .timing = {
+ .left_margin = 64,
+ .right_margin = 16,
+ .upper_margin = 64,
+ .lower_margin = 16,
+ .hsync_len = 48,
+ .vsync_len = 3,
+ .xres = 1024,
+ .yres = 600,
+ },
+ },
+ .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+ .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
+ VIDCON1_INV_VCLK,
+ .default_win = 0,
+ .bpp = 32,
+};
+#else
static struct s3c_fb_pd_win origen_fb_win0 = {
.win_mode = {
.left_margin = 64,
@@ -596,6 +618,8 @@
},
.max_bpp = 32,
.default_bpp = 24,
+ .virtual_x = 1024,
+ .virtual_y = 2 * 600,
};
static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
@@ -605,9 +629,10 @@
VIDCON1_INV_VCLK,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
};
+#endif
/* Bluetooth rfkill gpio platform data */
-struct rfkill_gpio_platform_data origen_bt_pdata = {
+static struct rfkill_gpio_platform_data origen_bt_pdata = {
.reset_gpio = EXYNOS4_GPX2(2),
.shutdown_gpio = -1,
.type = RFKILL_TYPE_BLUETOOTH,
@@ -644,6 +669,9 @@
&s5p_device_mfc_l,
&s5p_device_mfc_r,
&s5p_device_mixer,
+#ifdef CONFIG_DRM_EXYNOS
+ &exynos_device_drm,
+#endif
&exynos4_device_ohci,
&origen_device_gpiokeys,
&origen_lcd_hv070wsa,
@@ -719,7 +747,12 @@
s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL);
+#ifdef CONFIG_DRM_EXYNOS
+ s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
+ exynos4_fimd0_gpio_setup_24bpp();
+#else
s5p_fimd0_set_platdata(&origen_lcd_pdata);
+#endif
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index d00e4f0..7fca248 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -31,6 +31,7 @@
#include <plat/gpio-cfg.h>
#include <plat/iic.h>
#include <plat/keypad.h>
+#include <plat/mfc.h>
#include <plat/regs-serial.h>
#include <plat/sdhci.h>
@@ -244,6 +245,14 @@
&s3c_device_i2c7,
&s3c_device_rtc,
&s3c_device_wdt,
+ &s5p_device_fimc0,
+ &s5p_device_fimc1,
+ &s5p_device_fimc2,
+ &s5p_device_fimc3,
+ &s5p_device_fimc_md,
+ &s5p_device_mfc,
+ &s5p_device_mfc_l,
+ &s5p_device_mfc_r,
&samsung_device_keypad,
};
@@ -256,6 +265,11 @@
s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
}
+static void __init smdk4x12_reserve(void)
+{
+ s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
+}
+
static void __init smdk4x12_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
@@ -293,6 +307,7 @@
.init_machine = smdk4x12_machine_init,
.timer = &exynos4_timer,
.restart = exynos4_restart,
+ .reserve = &smdk4x12_reserve,
MACHINE_END
MACHINE_START(SMDK4412, "SMDK4412")
@@ -305,4 +320,5 @@
.init_machine = smdk4x12_machine_init,
.timer = &exynos4_timer,
.restart = exynos4_restart,
+ .reserve = &smdk4x12_reserve,
MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 83b91fa..afe7554 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -44,6 +44,7 @@
#include <mach/map.h>
#include <mach/ohci.h>
+#include <drm/exynos_drm.h>
#include "common.h"
/* Following are default values for UCON, ULCON and UFCON UART registers */
@@ -160,6 +161,26 @@
.dev.platform_data = &smdkv310_lcd_lte480wv_data,
};
+#ifdef CONFIG_DRM_EXYNOS
+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
+ .panel = {
+ .timing = {
+ .left_margin = 13,
+ .right_margin = 8,
+ .upper_margin = 7,
+ .lower_margin = 5,
+ .hsync_len = 3,
+ .vsync_len = 1,
+ .xres = 800,
+ .yres = 480,
+ },
+ },
+ .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+ .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .default_win = 0,
+ .bpp = 32,
+};
+#else
static struct s3c_fb_pd_win smdkv310_fb_win0 = {
.win_mode = {
.left_margin = 13,
@@ -181,6 +202,7 @@
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
};
+#endif
static struct resource smdkv310_smsc911x_resources[] = {
[0] = {
@@ -273,6 +295,9 @@
&s5p_device_fimc_md,
&s5p_device_g2d,
&s5p_device_jpeg,
+#ifdef CONFIG_DRM_EXYNOS
+ &exynos_device_drm,
+#endif
&exynos4_device_ac97,
&exynos4_device_i2s0,
&exynos4_device_ohci,
@@ -364,7 +389,12 @@
samsung_keypad_set_platdata(&smdkv310_keypad_data);
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
+#ifdef CONFIG_DRM_EXYNOS
+ s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
+ exynos4_fimd0_gpio_setup_24bpp();
+#else
s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
+#endif
smdkv310_ehci_init();
smdkv310_ohci_init();
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index a34036e..08e5a8e4 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -23,6 +23,7 @@
#include <linux/i2c-gpio.h>
#include <linux/i2c/mcs.h>
#include <linux/i2c/atmel_mxt_ts.h>
+#include <drm/exynos_drm.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
@@ -813,6 +814,29 @@
/* Gyro, To be updated */
};
+#ifdef CONFIG_DRM_EXYNOS
+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
+ .panel = {
+ .timing = {
+ .left_margin = 16,
+ .right_margin = 16,
+ .upper_margin = 2,
+ .lower_margin = 28,
+ .hsync_len = 2,
+ .vsync_len = 1,
+ .xres = 480,
+ .yres = 800,
+ .refresh = 55,
+ },
+ },
+ .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
+ VIDCON0_CLKSEL_LCD,
+ .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
+ | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+ .default_win = 3,
+ .bpp = 32,
+};
+#else
/* Frame Buffer */
static struct s3c_fb_pd_win universal_fb_win0 = {
.win_mode = {
@@ -840,6 +864,7 @@
| VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
};
+#endif
static struct regulator_consumer_supply cam_vt_dio_supply =
REGULATOR_SUPPLY("vdd_core", "0-003c");
@@ -1049,6 +1074,9 @@
&s5p_device_onenand,
&s5p_device_fimd0,
&s5p_device_jpeg,
+#ifdef CONFIG_DRM_EXYNOS
+ &exynos_device_drm,
+#endif
&s5p_device_mfc,
&s5p_device_mfc_l,
&s5p_device_mfc_r,
@@ -1096,7 +1124,12 @@
s5p_i2c_hdmiphy_set_platdata(NULL);
i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
+#ifdef CONFIG_DRM_EXYNOS
+ s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
+ exynos4_fimd0_gpio_setup_24bpp();
+#else
s5p_fimd0_set_platdata(&universal_lcd_pdata);
+#endif
universal_touchkey_init();
i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 7561eca..18399d1 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -163,6 +163,7 @@
select SOC_IMX25
select IMX_HAVE_PLATFORM_FLEXCAN
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
+ select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMXDI_RTC
select IMX_HAVE_PLATFORM_IMX_FB
select IMX_HAVE_PLATFORM_IMX_I2C
@@ -181,6 +182,7 @@
bool "Eukrea MBIMXSD development board"
select IMX_HAVE_PLATFORM_GPIO_KEYS
select IMX_HAVE_PLATFORM_IMX_SSI
+ select IMX_HAVE_PLATFORM_SPI_IMX
select LEDS_GPIO_REGISTER
help
This adds board specific devices that can be found on Eukrea's
@@ -606,6 +608,7 @@
select IMX_HAVE_PLATFORM_GPIO_KEYS
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IPU_CORE
+ select IMX_HAVE_PLATFORM_SPI_IMX
select LEDS_GPIO_REGISTER
help
This adds board specific devices that can be found on Eukrea's
@@ -682,42 +685,13 @@
Include support for MX51PDK (3DS) platform. This includes specific
configurations for the board and its peripherals.
-config MACH_EUKREA_CPUIMX51
- bool "Support Eukrea CPUIMX51 module"
- select SOC_IMX51
- select IMX_HAVE_PLATFORM_FSL_USB2_UDC
- select IMX_HAVE_PLATFORM_IMX_I2C
- select IMX_HAVE_PLATFORM_IMX_UART
- select IMX_HAVE_PLATFORM_MXC_EHCI
- select IMX_HAVE_PLATFORM_MXC_NAND
- select IMX_HAVE_PLATFORM_SPI_IMX
- help
- Include support for Eukrea CPUIMX51 platform. This includes
- specific configurations for the module and its peripherals.
-
-choice
- prompt "Baseboard"
- depends on MACH_EUKREA_CPUIMX51
- default MACH_EUKREA_MBIMX51_BASEBOARD
-
-config MACH_EUKREA_MBIMX51_BASEBOARD
- prompt "Eukrea MBIMX51 development board"
- bool
- select IMX_HAVE_PLATFORM_IMX_KEYPAD
- select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
- select LEDS_GPIO_REGISTER
- help
- This adds board specific devices that can be found on Eukrea's
- MBIMX51 evaluation board.
-
-endchoice
-
config MACH_EUKREA_CPUIMX51SD
bool "Support Eukrea CPUIMX51SD module"
select SOC_IMX51
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
+ select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SPI_IMX
@@ -733,6 +707,7 @@
config MACH_EUKREA_MBIMXSD51_BASEBOARD
prompt "Eukrea MBIMXSD development board"
bool
+ select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select LEDS_GPIO_REGISTER
help
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index ab939c5..4937c07 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -83,10 +83,8 @@
obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o
obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o
obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += mach-cpuimx51.o
-obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
-obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o
+obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
obj-$(CONFIG_MACH_MX51_EFIKAMX) += mach-mx51_efikamx.o
obj-$(CONFIG_MACH_MX51_EFIKASB) += mach-mx51_efikasb.o
diff --git a/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
deleted file mode 100644
index a6a3ab8..0000000
--- a/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/*
- *
- * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/serial_8250.h>
-#include <linux/i2c.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/i2c/tsc2007.h>
-#include <linux/leds.h>
-
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
-#include <asm/mach/arch.h>
-
-#include "devices-imx51.h"
-
-#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
-#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
-#define MBIMX51_LED1 IMX_GPIO_NR(3, 6)
-#define MBIMX51_LED2 IMX_GPIO_NR(3, 7)
-#define MBIMX51_LED3 IMX_GPIO_NR(3, 8)
-
-static const struct gpio_led mbimx51_leds[] __initconst = {
- {
- .name = "led0",
- .default_trigger = "heartbeat",
- .active_low = 1,
- .gpio = MBIMX51_LED0,
- },
- {
- .name = "led1",
- .default_trigger = "nand-disk",
- .active_low = 1,
- .gpio = MBIMX51_LED1,
- },
- {
- .name = "led2",
- .default_trigger = "mmc0",
- .active_low = 1,
- .gpio = MBIMX51_LED2,
- },
- {
- .name = "led3",
- .default_trigger = "default-on",
- .active_low = 1,
- .gpio = MBIMX51_LED3,
- },
-};
-
-static const struct gpio_led_platform_data mbimx51_leds_info __initconst = {
- .leds = mbimx51_leds,
- .num_leds = ARRAY_SIZE(mbimx51_leds),
-};
-
-static iomux_v3_cfg_t mbimx51_pads[] = {
- /* UART2 */
- MX51_PAD_UART2_RXD__UART2_RXD,
- MX51_PAD_UART2_TXD__UART2_TXD,
-
- /* UART3 */
- MX51_PAD_UART3_RXD__UART3_RXD,
- MX51_PAD_UART3_TXD__UART3_TXD,
- MX51_PAD_KEY_COL4__UART3_RTS,
- MX51_PAD_KEY_COL5__UART3_CTS,
-
- /* TSC2007 IRQ */
- MX51_PAD_NANDF_D10__GPIO3_30,
-
- /* LEDS */
- MX51_PAD_DISPB2_SER_DIN__GPIO3_5,
- MX51_PAD_DISPB2_SER_DIO__GPIO3_6,
- MX51_PAD_DISPB2_SER_CLK__GPIO3_7,
- MX51_PAD_DISPB2_SER_RS__GPIO3_8,
-
- /* KPP */
- MX51_PAD_KEY_ROW0__KEY_ROW0,
- MX51_PAD_KEY_ROW1__KEY_ROW1,
- MX51_PAD_KEY_ROW2__KEY_ROW2,
- MX51_PAD_KEY_ROW3__KEY_ROW3,
- MX51_PAD_KEY_COL0__KEY_COL0,
- MX51_PAD_KEY_COL1__KEY_COL1,
- MX51_PAD_KEY_COL2__KEY_COL2,
- MX51_PAD_KEY_COL3__KEY_COL3,
-
- /* SD 1 */
- MX51_PAD_SD1_CMD__SD1_CMD,
- MX51_PAD_SD1_CLK__SD1_CLK,
- MX51_PAD_SD1_DATA0__SD1_DATA0,
- MX51_PAD_SD1_DATA1__SD1_DATA1,
- MX51_PAD_SD1_DATA2__SD1_DATA2,
- MX51_PAD_SD1_DATA3__SD1_DATA3,
-
- /* SD 2 */
- MX51_PAD_SD2_CMD__SD2_CMD,
- MX51_PAD_SD2_CLK__SD2_CLK,
- MX51_PAD_SD2_DATA0__SD2_DATA0,
- MX51_PAD_SD2_DATA1__SD2_DATA1,
- MX51_PAD_SD2_DATA2__SD2_DATA2,
- MX51_PAD_SD2_DATA3__SD2_DATA3,
-};
-
-static const struct imxuart_platform_data uart_pdata __initconst = {
- .flags = IMXUART_HAVE_RTSCTS,
-};
-
-static int mbimx51_keymap[] = {
- KEY(0, 0, KEY_1),
- KEY(0, 1, KEY_2),
- KEY(0, 2, KEY_3),
- KEY(0, 3, KEY_UP),
-
- KEY(1, 0, KEY_4),
- KEY(1, 1, KEY_5),
- KEY(1, 2, KEY_6),
- KEY(1, 3, KEY_LEFT),
-
- KEY(2, 0, KEY_7),
- KEY(2, 1, KEY_8),
- KEY(2, 2, KEY_9),
- KEY(2, 3, KEY_RIGHT),
-
- KEY(3, 0, KEY_0),
- KEY(3, 1, KEY_DOWN),
- KEY(3, 2, KEY_ESC),
- KEY(3, 3, KEY_ENTER),
-};
-
-static const struct matrix_keymap_data mbimx51_map_data __initconst = {
- .keymap = mbimx51_keymap,
- .keymap_size = ARRAY_SIZE(mbimx51_keymap),
-};
-
-static int tsc2007_get_pendown_state(void)
-{
- return !gpio_get_value(MBIMX51_TSC2007_GPIO);
-}
-
-struct tsc2007_platform_data tsc2007_data = {
- .model = 2007,
- .x_plate_ohms = 180,
- .get_pendown_state = tsc2007_get_pendown_state,
-};
-
-static struct i2c_board_info mbimx51_i2c_devices[] = {
- {
- I2C_BOARD_INFO("tsc2007", 0x49),
- .irq = IMX_GPIO_TO_IRQ(MBIMX51_TSC2007_GPIO),
- .platform_data = &tsc2007_data,
- }, {
- I2C_BOARD_INFO("tlv320aic23", 0x1a),
- },
-};
-
-/*
- * baseboard initialization.
- */
-void __init eukrea_mbimx51_baseboard_init(void)
-{
- mxc_iomux_v3_setup_multiple_pads(mbimx51_pads,
- ARRAY_SIZE(mbimx51_pads));
-
- imx51_add_imx_uart(1, NULL);
- imx51_add_imx_uart(2, &uart_pdata);
-
- gpio_request(MBIMX51_LED0, "LED0");
- gpio_direction_output(MBIMX51_LED0, 1);
- gpio_free(MBIMX51_LED0);
- gpio_request(MBIMX51_LED1, "LED1");
- gpio_direction_output(MBIMX51_LED1, 1);
- gpio_free(MBIMX51_LED1);
- gpio_request(MBIMX51_LED2, "LED2");
- gpio_direction_output(MBIMX51_LED2, 1);
- gpio_free(MBIMX51_LED2);
- gpio_request(MBIMX51_LED3, "LED3");
- gpio_direction_output(MBIMX51_LED3, 1);
- gpio_free(MBIMX51_LED3);
-
- gpio_led_register_device(-1, &mbimx51_leds_info);
-
- imx51_add_imx_keypad(&mbimx51_map_data);
-
- gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
- gpio_direction_input(MBIMX51_TSC2007_GPIO);
- irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO),
- IRQF_TRIGGER_FALLING);
- i2c_register_board_info(1, mbimx51_i2c_devices,
- ARRAY_SIZE(mbimx51_i2c_devices));
-
- imx51_add_sdhci_esdhc_imx(0, NULL);
- imx51_add_sdhci_esdhc_imx(1, NULL);
-}
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
deleted file mode 100644
index aaa592fd..0000000
--- a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * Copyright (C) 2010 Eric Benard - eric@eukrea.com
- *
- * Based on pcm970-baseboard.c which is :
- * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-
-#include <linux/gpio.h>
-#include <linux/interrupt.h>
-#include <linux/leds.h>
-#include <linux/platform_device.h>
-#include <linux/input.h>
-#include <linux/i2c.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-
-#include "devices-imx51.h"
-
-static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
- /* LED */
- MX51_PAD_NANDF_D10__GPIO3_30,
- /* SWITCH */
- NEW_PAD_CTRL(MX51_PAD_NANDF_D9__GPIO3_31, PAD_CTL_PUS_22K_UP |
- PAD_CTL_PKE | PAD_CTL_SRE_FAST |
- PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
- /* UART2 */
- MX51_PAD_UART2_RXD__UART2_RXD,
- MX51_PAD_UART2_TXD__UART2_TXD,
- /* UART 3 */
- MX51_PAD_UART3_RXD__UART3_RXD,
- MX51_PAD_UART3_TXD__UART3_TXD,
- MX51_PAD_KEY_COL4__UART3_RTS,
- MX51_PAD_KEY_COL5__UART3_CTS,
- /* SD */
- MX51_PAD_SD1_CMD__SD1_CMD,
- MX51_PAD_SD1_CLK__SD1_CLK,
- MX51_PAD_SD1_DATA0__SD1_DATA0,
- MX51_PAD_SD1_DATA1__SD1_DATA1,
- MX51_PAD_SD1_DATA2__SD1_DATA2,
- MX51_PAD_SD1_DATA3__SD1_DATA3,
- /* SD1 CD */
- NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |
- PAD_CTL_PKE | PAD_CTL_SRE_FAST |
- PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
-};
-
-#define GPIO_LED1 IMX_GPIO_NR(3, 30)
-#define GPIO_SWITCH1 IMX_GPIO_NR(3, 31)
-
-static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {
- {
- .name = "led1",
- .default_trigger = "heartbeat",
- .active_low = 1,
- .gpio = GPIO_LED1,
- },
-};
-
-static const struct gpio_led_platform_data
- eukrea_mbimxsd_led_info __initconst = {
- .leds = eukrea_mbimxsd_leds,
- .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
-};
-
-static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
- {
- .gpio = GPIO_SWITCH1,
- .code = BTN_0,
- .desc = "BP1",
- .active_low = 1,
- .wakeup = 1,
- },
-};
-
-static const struct gpio_keys_platform_data
- eukrea_mbimxsd_button_data __initconst = {
- .buttons = eukrea_mbimxsd_gpio_buttons,
- .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
-};
-
-static const struct imxuart_platform_data uart_pdata __initconst = {
- .flags = IMXUART_HAVE_RTSCTS,
-};
-
-static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
- {
- I2C_BOARD_INFO("tlv320aic23", 0x1a),
- },
-};
-
-/*
- * system init for baseboard usage. Will be called by cpuimx51sd init.
- *
- * Add platform devices present on this baseboard and init
- * them from CPU side as far as required to use them later on
- */
-void __init eukrea_mbimxsd51_baseboard_init(void)
-{
- if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
- ARRAY_SIZE(eukrea_mbimxsd_pads)))
- printk(KERN_ERR "error setting mbimxsd pads !\n");
-
- imx51_add_imx_uart(1, NULL);
- imx51_add_imx_uart(2, &uart_pdata);
-
- imx51_add_sdhci_esdhc_imx(0, NULL);
-
- gpio_request(GPIO_LED1, "LED1");
- gpio_direction_output(GPIO_LED1, 1);
- gpio_free(GPIO_LED1);
-
- gpio_request(GPIO_SWITCH1, "SWITCH1");
- gpio_direction_input(GPIO_SWITCH1);
- gpio_free(GPIO_SWITCH1);
-
- i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
- ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
-
- gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
- imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
-}
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index 2cf603e..dfd2da8 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -23,6 +23,7 @@
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/input.h>
+#include <linux/spi/spi.h>
#include <video/platform_lcd.h>
#include <mach/hardware.h>
@@ -87,12 +88,22 @@
/* CAN */
MX25_PAD_GPIO_D__CAN2_RX,
MX25_PAD_GPIO_C__CAN2_TX,
+ /* SPI1 */
+ MX25_PAD_CSPI1_MOSI__CSPI1_MOSI,
+ MX25_PAD_CSPI1_MISO__CSPI1_MISO,
+ MX25_PAD_CSPI1_SS0__GPIO_1_16,
+ MX25_PAD_CSPI1_SS1__GPIO_1_17,
+ MX25_PAD_CSPI1_SCLK__CSPI1_SCLK,
+ MX25_PAD_CSPI1_RDY__GPIO_2_22,
};
-#define GPIO_LED1 83
-#define GPIO_SWITCH1 82
-#define GPIO_SD1CD 52
-#define GPIO_LCDPWR 26
+#define GPIO_LED1 IMX_GPIO_NR(3, 19)
+#define GPIO_SWITCH1 IMX_GPIO_NR(3, 18)
+#define GPIO_SD1CD IMX_GPIO_NR(2, 20)
+#define GPIO_LCDPWR IMX_GPIO_NR(1, 26)
+#define GPIO_SPI1_SS0 IMX_GPIO_NR(1, 16)
+#define GPIO_SPI1_SS1 IMX_GPIO_NR(1, 17)
+#define GPIO_SPI1_IRQ IMX_GPIO_NR(2, 22)
static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
{
@@ -228,6 +239,30 @@
.wp_type = ESDHC_WP_NONE,
};
+static struct spi_board_info eukrea_mbimxsd25_spi_board_info[] __initdata = {
+ {
+ .modalias = "spidev",
+ .max_speed_hz = 20000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ .mode = SPI_MODE_0,
+ },
+ {
+ .modalias = "spidev",
+ .max_speed_hz = 20000000,
+ .bus_num = 0,
+ .chip_select = 1,
+ .mode = SPI_MODE_0,
+ },
+};
+
+static int eukrea_mbimxsd25_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};
+
+static const struct spi_imx_master eukrea_mbimxsd25_spi0_data __initconst = {
+ .chipselect = eukrea_mbimxsd25_spi_cs,
+ .num_chipselect = ARRAY_SIZE(eukrea_mbimxsd25_spi_cs),
+};
+
/*
* system init for baseboard usage. Will be called by cpuimx25 init.
*
@@ -257,11 +292,17 @@
gpio_request(GPIO_LCDPWR, "LCDPWR");
gpio_direction_output(GPIO_LCDPWR, 1);
- gpio_free(GPIO_SWITCH1);
i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
+ gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
+ gpio_direction_input(GPIO_SPI1_IRQ);
+ gpio_free(GPIO_SPI1_IRQ);
+ imx25_add_spi_imx0(&eukrea_mbimxsd25_spi0_data);
+ spi_register_board_info(eukrea_mbimxsd25_spi_board_info,
+ ARRAY_SIZE(eukrea_mbimxsd25_spi_board_info));
+
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index fd8bf8a..557f6c48 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -27,6 +27,7 @@
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/input.h>
+#include <linux/spi/spi.h>
#include <video/platform_lcd.h>
#include <linux/i2c.h>
@@ -158,12 +159,22 @@
MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
/* SD1 CD */
MX35_PAD_LD18__GPIO3_24,
+ /* SPI */
+ MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
+ MX35_PAD_CSPI1_MISO__CSPI1_MISO,
+ MX35_PAD_CSPI1_SS0__GPIO1_18,
+ MX35_PAD_CSPI1_SS1__GPIO1_19,
+ MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
+ MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,
};
#define GPIO_LED1 IMX_GPIO_NR(3, 29)
#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
#define GPIO_SD1CD IMX_GPIO_NR(3, 24)
+#define GPIO_SPI1_SS0 IMX_GPIO_NR(1, 18)
+#define GPIO_SPI1_SS1 IMX_GPIO_NR(1, 19)
+#define GPIO_SPI1_IRQ IMX_GPIO_NR(3, 5)
static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
unsigned int power)
@@ -239,6 +250,30 @@
.wp_type = ESDHC_WP_NONE,
};
+static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {
+ {
+ .modalias = "spidev",
+ .max_speed_hz = 20000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ .mode = SPI_MODE_0,
+ },
+ {
+ .modalias = "spidev",
+ .max_speed_hz = 20000000,
+ .bus_num = 0,
+ .chip_select = 1,
+ .mode = SPI_MODE_0,
+ },
+};
+
+static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};
+
+static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {
+ .chipselect = eukrea_mbimxsd35_spi_cs,
+ .num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),
+};
+
/*
* system init for baseboard usage. Will be called by cpuimx35 init.
*
@@ -274,6 +309,13 @@
i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
+ gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
+ gpio_direction_input(GPIO_SPI1_IRQ);
+ gpio_free(GPIO_SPI1_IRQ);
+ imx35_add_spi_imx0(&eukrea_mbimxsd35_spi0_data);
+ spi_register_board_info(eukrea_mbimxsd35_spi_board_info,
+ ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));
+
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
new file mode 100644
index 0000000..96a24b7
--- /dev/null
+++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
@@ -0,0 +1,231 @@
+/*
+ * Copyright (C) 2010 Eric Benard - eric@eukrea.com
+ *
+ * Based on pcm970-baseboard.c which is :
+ * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/leds.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/i2c.h>
+#include <video/platform_lcd.h>
+#include <linux/backlight.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <mach/common.h>
+#include <mach/iomux-mx51.h>
+
+#include "devices-imx51.h"
+
+static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = {
+ /* LED */
+ MX51_PAD_NANDF_D10__GPIO3_30,
+ /* SWITCH */
+ NEW_PAD_CTRL(MX51_PAD_NANDF_D9__GPIO3_31, PAD_CTL_PUS_22K_UP |
+ PAD_CTL_PKE | PAD_CTL_SRE_FAST |
+ PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
+ /* UART2 */
+ MX51_PAD_UART2_RXD__UART2_RXD,
+ MX51_PAD_UART2_TXD__UART2_TXD,
+ /* UART 3 */
+ MX51_PAD_UART3_RXD__UART3_RXD,
+ MX51_PAD_UART3_TXD__UART3_TXD,
+ MX51_PAD_KEY_COL4__UART3_RTS,
+ MX51_PAD_KEY_COL5__UART3_CTS,
+ /* SD */
+ MX51_PAD_SD1_CMD__SD1_CMD,
+ MX51_PAD_SD1_CLK__SD1_CLK,
+ MX51_PAD_SD1_DATA0__SD1_DATA0,
+ MX51_PAD_SD1_DATA1__SD1_DATA1,
+ MX51_PAD_SD1_DATA2__SD1_DATA2,
+ MX51_PAD_SD1_DATA3__SD1_DATA3,
+ /* SD1 CD */
+ NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |
+ PAD_CTL_PKE | PAD_CTL_SRE_FAST |
+ PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
+ /* SSI */
+ MX51_PAD_AUD3_BB_TXD__AUD3_TXD,
+ MX51_PAD_AUD3_BB_RXD__AUD3_RXD,
+ MX51_PAD_AUD3_BB_CK__AUD3_TXC,
+ MX51_PAD_AUD3_BB_FS__AUD3_TXFS,
+ /* LCD Backlight */
+ MX51_PAD_DI1_D1_CS__GPIO3_4,
+ /* LCD RST */
+ MX51_PAD_CSI1_D9__GPIO3_13,
+};
+
+#define GPIO_LED1 IMX_GPIO_NR(3, 30)
+#define GPIO_SWITCH1 IMX_GPIO_NR(3, 31)
+#define GPIO_LCDRST IMX_GPIO_NR(3, 13)
+#define GPIO_LCDBL IMX_GPIO_NR(3, 4)
+
+static void eukrea_mbimxsd51_lcd_power_set(struct plat_lcd_data *pd,
+ unsigned int power)
+{
+ if (power)
+ gpio_direction_output(GPIO_LCDRST, 1);
+ else
+ gpio_direction_output(GPIO_LCDRST, 0);
+}
+
+static struct plat_lcd_data eukrea_mbimxsd51_lcd_power_data = {
+ .set_power = eukrea_mbimxsd51_lcd_power_set,
+};
+
+static struct platform_device eukrea_mbimxsd51_lcd_powerdev = {
+ .name = "platform-lcd",
+ .dev.platform_data = &eukrea_mbimxsd51_lcd_power_data,
+};
+
+static void eukrea_mbimxsd51_bl_set_intensity(int intensity)
+{
+ if (intensity)
+ gpio_direction_output(GPIO_LCDBL, 1);
+ else
+ gpio_direction_output(GPIO_LCDBL, 0);
+}
+
+static struct generic_bl_info eukrea_mbimxsd51_bl_info = {
+ .name = "eukrea_mbimxsd51-bl",
+ .max_intensity = 0xff,
+ .default_intensity = 0xff,
+ .set_bl_intensity = eukrea_mbimxsd51_bl_set_intensity,
+};
+
+static struct platform_device eukrea_mbimxsd51_bl_dev = {
+ .name = "generic-bl",
+ .id = 1,
+ .dev = {
+ .platform_data = &eukrea_mbimxsd51_bl_info,
+ },
+};
+
+static const struct gpio_led eukrea_mbimxsd51_leds[] __initconst = {
+ {
+ .name = "led1",
+ .default_trigger = "heartbeat",
+ .active_low = 1,
+ .gpio = GPIO_LED1,
+ },
+};
+
+static const struct gpio_led_platform_data
+ eukrea_mbimxsd51_led_info __initconst = {
+ .leds = eukrea_mbimxsd51_leds,
+ .num_leds = ARRAY_SIZE(eukrea_mbimxsd51_leds),
+};
+
+static struct gpio_keys_button eukrea_mbimxsd51_gpio_buttons[] = {
+ {
+ .gpio = GPIO_SWITCH1,
+ .code = BTN_0,
+ .desc = "BP1",
+ .active_low = 1,
+ .wakeup = 1,
+ },
+};
+
+static const struct gpio_keys_platform_data
+ eukrea_mbimxsd51_button_data __initconst = {
+ .buttons = eukrea_mbimxsd51_gpio_buttons,
+ .nbuttons = ARRAY_SIZE(eukrea_mbimxsd51_gpio_buttons),
+};
+
+static const struct imxuart_platform_data uart_pdata __initconst = {
+ .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static struct i2c_board_info eukrea_mbimxsd51_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("tlv320aic23", 0x1a),
+ },
+};
+
+static const
+struct imx_ssi_platform_data eukrea_mbimxsd51_ssi_pdata __initconst = {
+ .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
+};
+
+static int screen_type;
+
+static int __init eukrea_mbimxsd51_screen_type(char *options)
+{
+ if (!strcmp(options, "dvi"))
+ screen_type = 1;
+ else if (!strcmp(options, "tft"))
+ screen_type = 0;
+
+ return 0;
+}
+__setup("screen_type=", eukrea_mbimxsd51_screen_type);
+
+/*
+ * system init for baseboard usage. Will be called by cpuimx51sd init.
+ *
+ * Add platform devices present on this baseboard and init
+ * them from CPU side as far as required to use them later on
+ */
+void __init eukrea_mbimxsd51_baseboard_init(void)
+{
+ if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd51_pads,
+ ARRAY_SIZE(eukrea_mbimxsd51_pads)))
+ printk(KERN_ERR "error setting mbimxsd pads !\n");
+
+ imx51_add_imx_uart(1, NULL);
+ imx51_add_imx_uart(2, &uart_pdata);
+
+ imx51_add_sdhci_esdhc_imx(0, NULL);
+
+ imx51_add_imx_ssi(0, &eukrea_mbimxsd51_ssi_pdata);
+
+ gpio_request(GPIO_LED1, "LED1");
+ gpio_direction_output(GPIO_LED1, 1);
+ gpio_free(GPIO_LED1);
+
+ gpio_request(GPIO_SWITCH1, "SWITCH1");
+ gpio_direction_input(GPIO_SWITCH1);
+ gpio_free(GPIO_SWITCH1);
+
+ gpio_request(GPIO_LCDRST, "LCDRST");
+ gpio_direction_output(GPIO_LCDRST, 0);
+ gpio_request(GPIO_LCDBL, "LCDBL");
+ gpio_direction_output(GPIO_LCDBL, 0);
+ if (!screen_type) {
+ platform_device_register(&eukrea_mbimxsd51_bl_dev);
+ platform_device_register(&eukrea_mbimxsd51_lcd_powerdev);
+ } else {
+ gpio_free(GPIO_LCDRST);
+ gpio_free(GPIO_LCDBL);
+ }
+
+ i2c_register_board_info(0, eukrea_mbimxsd51_i2c_devices,
+ ARRAY_SIZE(eukrea_mbimxsd51_i2c_devices));
+
+ gpio_led_register_device(-1, &eukrea_mbimxsd51_led_info);
+ imx_add_gpio_keys(&eukrea_mbimxsd51_button_data);
+}
diff --git a/arch/arm/mach-imx/mach-cpuimx51.c b/arch/arm/mach-imx/mach-cpuimx51.c
deleted file mode 100644
index 944025d..0000000
--- a/arch/arm/mach-imx/mach-cpuimx51.c
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- *
- * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
- *
- * based on board-mx51_babbage.c which is
- * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/serial_8250.h>
-#include <linux/i2c.h>
-#include <linux/gpio.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
-
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/time.h>
-
-#include "devices-imx51.h"
-
-#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27)
-#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28)
-#define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25)
-#define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26)
-#define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27)
-#define CPUIMX51_QUART_XTAL 14745600
-#define CPUIMX51_QUART_REGSHIFT 17
-
-/* USB_CTRL_1 */
-#define MX51_USB_CTRL_1_OFFSET 0x10
-#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
-
-#define MX51_USB_PLLDIV_12_MHZ 0x00
-#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
-#define MX51_USB_PLL_DIV_24_MHZ 0x02
-
-static struct plat_serial8250_port serial_platform_data[] = {
- {
- .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
- .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),
- .irqflags = IRQF_TRIGGER_HIGH,
- .uartclk = CPUIMX51_QUART_XTAL,
- .regshift = CPUIMX51_QUART_REGSHIFT,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
- }, {
- .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
- .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),
- .irqflags = IRQF_TRIGGER_HIGH,
- .uartclk = CPUIMX51_QUART_XTAL,
- .regshift = CPUIMX51_QUART_REGSHIFT,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
- }, {
- .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
- .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),
- .irqflags = IRQF_TRIGGER_HIGH,
- .uartclk = CPUIMX51_QUART_XTAL,
- .regshift = CPUIMX51_QUART_REGSHIFT,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
- }, {
- .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
- .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),
- .irqflags = IRQF_TRIGGER_HIGH,
- .uartclk = CPUIMX51_QUART_XTAL,
- .regshift = CPUIMX51_QUART_REGSHIFT,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
- }, {
- }
-};
-
-static struct platform_device serial_device = {
- .name = "serial8250",
- .id = 0,
- .dev = {
- .platform_data = serial_platform_data,
- },
-};
-
-static struct platform_device *devices[] __initdata = {
- &serial_device,
-};
-
-static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = {
- /* UART1 */
- MX51_PAD_UART1_RXD__UART1_RXD,
- MX51_PAD_UART1_TXD__UART1_TXD,
- MX51_PAD_UART1_RTS__UART1_RTS,
- MX51_PAD_UART1_CTS__UART1_CTS,
-
- /* I2C2 */
- MX51_PAD_GPIO1_2__I2C2_SCL,
- MX51_PAD_GPIO1_3__I2C2_SDA,
- MX51_PAD_NANDF_D10__GPIO3_30,
-
- /* QUART IRQ */
- MX51_PAD_NANDF_D15__GPIO3_25,
- MX51_PAD_NANDF_D14__GPIO3_26,
- MX51_PAD_NANDF_D13__GPIO3_27,
- MX51_PAD_NANDF_D12__GPIO3_28,
-
- /* USB HOST1 */
- MX51_PAD_USBH1_CLK__USBH1_CLK,
- MX51_PAD_USBH1_DIR__USBH1_DIR,
- MX51_PAD_USBH1_NXT__USBH1_NXT,
- MX51_PAD_USBH1_DATA0__USBH1_DATA0,
- MX51_PAD_USBH1_DATA1__USBH1_DATA1,
- MX51_PAD_USBH1_DATA2__USBH1_DATA2,
- MX51_PAD_USBH1_DATA3__USBH1_DATA3,
- MX51_PAD_USBH1_DATA4__USBH1_DATA4,
- MX51_PAD_USBH1_DATA5__USBH1_DATA5,
- MX51_PAD_USBH1_DATA6__USBH1_DATA6,
- MX51_PAD_USBH1_DATA7__USBH1_DATA7,
- MX51_PAD_USBH1_STP__USBH1_STP,
-};
-
-static const struct mxc_nand_platform_data
- eukrea_cpuimx51_nand_board_info __initconst = {
- .width = 1,
- .hw_ecc = 1,
- .flash_bbt = 1,
-};
-
-static const struct imxuart_platform_data uart_pdata __initconst = {
- .flags = IMXUART_HAVE_RTSCTS,
-};
-
-static const
-struct imxi2c_platform_data eukrea_cpuimx51_i2c_data __initconst = {
- .bitrate = 100000,
-};
-
-static struct i2c_board_info eukrea_cpuimx51_i2c_devices[] = {
- {
- I2C_BOARD_INFO("pcf8563", 0x51),
- },
-};
-
-/* This function is board specific as the bit mask for the plldiv will also
-be different for other Freescale SoCs, thus a common bitmask is not
-possible and cannot get place in /plat-mxc/ehci.c.*/
-static int initialize_otg_port(struct platform_device *pdev)
-{
- u32 v;
- void __iomem *usb_base;
- void __iomem *usbother_base;
-
- usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
- if (!usb_base)
- return -ENOMEM;
- usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-
- /* Set the PHY clock to 19.2MHz */
- v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
- v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
- v |= MX51_USB_PLL_DIV_19_2_MHZ;
- __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
- iounmap(usb_base);
-
- mdelay(10);
-
- return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
-}
-
-static int initialize_usbh1_port(struct platform_device *pdev)
-{
- u32 v;
- void __iomem *usb_base;
- void __iomem *usbother_base;
-
- usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
- if (!usb_base)
- return -ENOMEM;
- usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-
- /* The clock for the USBH1 ULPI port will come externally from the PHY. */
- v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
- __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
- iounmap(usb_base);
-
- mdelay(10);
-
- return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
- MXC_EHCI_ITC_NO_THRESHOLD);
-}
-
-static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
- .init = initialize_otg_port,
- .portsc = MXC_EHCI_UTMI_16BIT,
-};
-
-static const struct fsl_usb2_platform_data usb_pdata __initconst = {
- .operating_mode = FSL_USB2_DR_DEVICE,
- .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
-};
-
-static const struct mxc_usbh_platform_data usbh1_config __initconst = {
- .init = initialize_usbh1_port,
- .portsc = MXC_EHCI_MODE_ULPI,
-};
-
-static int otg_mode_host;
-
-static int __init eukrea_cpuimx51_otg_mode(char *options)
-{
- if (!strcmp(options, "host"))
- otg_mode_host = 1;
- else if (!strcmp(options, "device"))
- otg_mode_host = 0;
- else
- pr_info("otg_mode neither \"host\" nor \"device\". "
- "Defaulting to device\n");
- return 0;
-}
-__setup("otg_mode=", eukrea_cpuimx51_otg_mode);
-
-/*
- * Board specific initialization.
- */
-static void __init eukrea_cpuimx51_init(void)
-{
- imx51_soc_init();
-
- mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads,
- ARRAY_SIZE(eukrea_cpuimx51_pads));
-
- imx51_add_imx_uart(0, &uart_pdata);
- imx51_add_mxc_nand(&eukrea_cpuimx51_nand_board_info);
-
- gpio_request(CPUIMX51_QUARTA_GPIO, "quarta_irq");
- gpio_direction_input(CPUIMX51_QUARTA_GPIO);
- gpio_free(CPUIMX51_QUARTA_GPIO);
- gpio_request(CPUIMX51_QUARTB_GPIO, "quartb_irq");
- gpio_direction_input(CPUIMX51_QUARTB_GPIO);
- gpio_free(CPUIMX51_QUARTB_GPIO);
- gpio_request(CPUIMX51_QUARTC_GPIO, "quartc_irq");
- gpio_direction_input(CPUIMX51_QUARTC_GPIO);
- gpio_free(CPUIMX51_QUARTC_GPIO);
- gpio_request(CPUIMX51_QUARTD_GPIO, "quartd_irq");
- gpio_direction_input(CPUIMX51_QUARTD_GPIO);
- gpio_free(CPUIMX51_QUARTD_GPIO);
-
- imx51_add_fec(NULL);
- platform_add_devices(devices, ARRAY_SIZE(devices));
-
- imx51_add_imx_i2c(1, &eukrea_cpuimx51_i2c_data);
- i2c_register_board_info(1, eukrea_cpuimx51_i2c_devices,
- ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));
-
- if (otg_mode_host)
- imx51_add_mxc_ehci_otg(&dr_utmi_config);
- else {
- initialize_otg_port(NULL);
- imx51_add_fsl_usb2_udc(&usb_pdata);
- }
- imx51_add_mxc_ehci_hs(1, &usbh1_config);
-
-#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD
- eukrea_mbimx51_baseboard_init();
-#endif
-}
-
-static void __init eukrea_cpuimx51_timer_init(void)
-{
- mx51_clocks_init(32768, 24000000, 22579200, 0);
-}
-
-static struct sys_timer mxc_timer = {
- .init = eukrea_cpuimx51_timer_init,
-};
-
-MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
- /* Maintainer: Eric Bénard <eric@eukrea.com> */
- .atag_offset = 0x100,
- .map_io = mx51_map_io,
- .init_early = imx51_init_early,
- .init_irq = mx51_init_irq,
- .handle_irq = imx51_handle_irq,
- .timer = &mxc_timer,
- .init_machine = eukrea_cpuimx51_init,
- .restart = mxc_restart,
-MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index 9fbe923..ce341a6 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -41,11 +41,13 @@
#define USBH1_RST IMX_GPIO_NR(2, 28)
#define ETH_RST IMX_GPIO_NR(2, 31)
-#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 12)
+#define TSC2007_IRQGPIO_REV2 IMX_GPIO_NR(3, 12)
+#define TSC2007_IRQGPIO_REV3 IMX_GPIO_NR(4, 0)
#define CAN_IRQGPIO IMX_GPIO_NR(1, 1)
#define CAN_RST IMX_GPIO_NR(4, 15)
#define CAN_NCS IMX_GPIO_NR(4, 24)
-#define CAN_RXOBF IMX_GPIO_NR(1, 4)
+#define CAN_RXOBF_REV2 IMX_GPIO_NR(1, 4)
+#define CAN_RXOBF_REV3 IMX_GPIO_NR(3, 12)
#define CAN_RX1BF IMX_GPIO_NR(1, 6)
#define CAN_TXORTS IMX_GPIO_NR(1, 7)
#define CAN_TX1RTS IMX_GPIO_NR(1, 8)
@@ -90,6 +92,10 @@
MX51_PAD_I2C1_CLK__GPIO4_16,
MX51_PAD_I2C1_DAT__GPIO4_17,
+ /* I2C1 */
+ MX51_PAD_SD2_CMD__I2C1_SCL,
+ MX51_PAD_SD2_CLK__I2C1_SDA,
+
/* CAN */
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
@@ -108,15 +114,27 @@
NEW_PAD_CTRL(MX51_PAD_GPIO_NAND__GPIO_NAND, PAD_CTL_PUS_22K_UP |
PAD_CTL_PKE | PAD_CTL_SRE_FAST |
PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
+ NEW_PAD_CTRL(MX51_PAD_NANDF_D8__GPIO4_0, PAD_CTL_PUS_22K_UP |
+ PAD_CTL_PKE | PAD_CTL_SRE_FAST |
+ PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
+static int tsc2007_get_pendown_state(void)
+{
+ if (mx51_revision() < IMX_CHIP_REVISION_3_0)
+ return !gpio_get_value(TSC2007_IRQGPIO_REV2);
+ else
+ return !gpio_get_value(TSC2007_IRQGPIO_REV3);
+}
+
static struct tsc2007_platform_data tsc2007_info = {
.model = 2007,
.x_plate_ohms = 180,
+ .get_pendown_state = tsc2007_get_pendown_state,
};
static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
@@ -126,7 +144,6 @@
I2C_BOARD_INFO("tsc2007", 0x49),
.type = "tsc2007",
.platform_data = &tsc2007_info,
- .irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
},
};
@@ -255,10 +272,14 @@
.num_chipselect = ARRAY_SIZE(cpuimx51sd_spi1_cs),
};
-static struct platform_device *platform_devices[] __initdata = {
+static struct platform_device *rev2_platform_devices[] __initdata = {
&hsi2c_gpio_device,
};
+static const struct imxi2c_platform_data cpuimx51sd_i2c_data __initconst = {
+ .bitrate = 100000,
+};
+
static void __init eukrea_cpuimx51sd_init(void)
{
imx51_soc_init();
@@ -272,6 +293,7 @@
imx51_add_imx_uart(0, &uart_pdata);
imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info);
+ imx51_add_imx2_wdt(0, NULL);
gpio_request(ETH_RST, "eth_rst");
gpio_set_value(ETH_RST, 1);
@@ -291,13 +313,25 @@
spi_register_board_info(cpuimx51sd_spi_device,
ARRAY_SIZE(cpuimx51sd_spi_device));
- gpio_request(TSC2007_IRQGPIO, "tsc2007_irq");
- gpio_direction_input(TSC2007_IRQGPIO);
- gpio_free(TSC2007_IRQGPIO);
+ if (mx51_revision() < IMX_CHIP_REVISION_3_0) {
+ eukrea_cpuimx51sd_i2c_devices[1].irq =
+ gpio_to_irq(TSC2007_IRQGPIO_REV2),
+ platform_add_devices(rev2_platform_devices,
+ ARRAY_SIZE(rev2_platform_devices));
+ gpio_request(TSC2007_IRQGPIO_REV2, "tsc2007_irq");
+ gpio_direction_input(TSC2007_IRQGPIO_REV2);
+ gpio_free(TSC2007_IRQGPIO_REV2);
+ } else {
+ eukrea_cpuimx51sd_i2c_devices[1].irq =
+ gpio_to_irq(TSC2007_IRQGPIO_REV3),
+ imx51_add_imx_i2c(0, &cpuimx51sd_i2c_data);
+ gpio_request(TSC2007_IRQGPIO_REV3, "tsc2007_irq");
+ gpio_direction_input(TSC2007_IRQGPIO_REV3);
+ gpio_free(TSC2007_IRQGPIO_REV3);
+ }
i2c_register_board_info(0, eukrea_cpuimx51sd_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx51sd_i2c_devices));
- platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
if (otg_mode_host)
imx51_add_mxc_ehci_otg(&dr_utmi_config);
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 76a97a5..d1e04e6 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -106,6 +106,7 @@
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI,
+ .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
};
static int otg_mode_host;
@@ -135,6 +136,7 @@
imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
imx25_add_imxdi_rtc(NULL);
imx25_add_fec(&mx25_fec_pdata);
+ imx25_add_imx2_wdt(NULL);
i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index f7b074f..748ba2e 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -38,6 +38,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <asm/system.h>
#include <mach/common.h>
#include <mach/iomux-mx27.h>
@@ -48,6 +49,14 @@
#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
#define SDHC1_IRQ IRQ_GPIOB(25)
+#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
+#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
+#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
+
+#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
+#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
+#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
+
static const int visstrim_m10_pins[] __initconst = {
/* UART1 (console) */
PE12_PF_UART1_TXD,
@@ -119,6 +128,23 @@
PB19_PF_CSI_D7,
PB20_PF_CSI_VSYNC,
PB21_PF_CSI_HSYNC,
+ /* mother board version */
+ MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+ MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+ MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+ /* expansion board version */
+ EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+ EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+ EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+};
+
+static struct gpio visstrim_m10_version_gpios[] = {
+ { EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
+ { EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
+ { EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
+ { MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
+ { MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
+ { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
};
/* Camera */
@@ -369,11 +395,40 @@
.flags = IMX_SSI_DMA | IMX_SSI_SYN,
};
+static void __init visstrim_m10_revision(void)
+{
+ int exp_version = 0;
+ int mo_version = 0;
+ int ret;
+
+ ret = gpio_request_array(visstrim_m10_version_gpios,
+ ARRAY_SIZE(visstrim_m10_version_gpios));
+ if (ret) {
+ pr_err("Failed to request version gpios");
+ return;
+ }
+
+ /* Get expansion board version (negative logic) */
+ exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
+ exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
+ exp_version |= !gpio_get_value(EXPBOARD_BIT0);
+
+ /* Get mother board version (negative logic) */
+ mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
+ mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
+ mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
+
+ system_rev = 0x27000;
+ system_rev |= (mo_version << 4);
+ system_rev |= exp_version;
+}
+
static void __init visstrim_m10_board_init(void)
{
int ret;
imx27_soc_init();
+ visstrim_m10_revision();
ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 6ae51c6..e99b016 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -34,6 +34,8 @@
#include <linux/usb/otg.h>
#include <linux/mtd/physmap.h>
+#include <linux/mfd/mc13892.h>
+#include <linux/regulator/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -253,6 +255,8 @@
MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
+ /*PMIC IRQ*/
+ MX35_PAD_GPIO2_0__GPIO2_0,
};
/*
@@ -317,6 +321,193 @@
},
};
+static struct regulator_consumer_supply sw1_consumers[] = {
+ {
+ .supply = "cpu_vcc",
+ }
+};
+
+static struct regulator_consumer_supply vcam_consumers[] = {
+ /* sgtl5000 */
+ REGULATOR_SUPPLY("VDDA", "0-000a"),
+};
+
+static struct regulator_consumer_supply vaudio_consumers[] = {
+ REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
+};
+
+static struct regulator_init_data sw1_init = {
+ .constraints = {
+ .name = "SW1",
+ .min_uV = 600000,
+ .max_uV = 1375000,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ .valid_modes_mask = 0,
+ .always_on = 1,
+ .boot_on = 1,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
+ .consumer_supplies = sw1_consumers,
+};
+
+static struct regulator_init_data sw2_init = {
+ .constraints = {
+ .name = "SW2",
+ .always_on = 1,
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data sw3_init = {
+ .constraints = {
+ .name = "SW3",
+ .always_on = 1,
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data sw4_init = {
+ .constraints = {
+ .name = "SW4",
+ .always_on = 1,
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data viohi_init = {
+ .constraints = {
+ .name = "VIOHI",
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data vusb_init = {
+ .constraints = {
+ .name = "VUSB",
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data vdig_init = {
+ .constraints = {
+ .name = "VDIG",
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data vpll_init = {
+ .constraints = {
+ .name = "VPLL",
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data vusb2_init = {
+ .constraints = {
+ .name = "VUSB2",
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data vvideo_init = {
+ .constraints = {
+ .name = "VVIDEO",
+ .boot_on = 1
+ }
+};
+
+static struct regulator_init_data vaudio_init = {
+ .constraints = {
+ .name = "VAUDIO",
+ .min_uV = 2300000,
+ .max_uV = 3000000,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ .boot_on = 1
+ },
+ .num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
+ .consumer_supplies = vaudio_consumers,
+};
+
+static struct regulator_init_data vcam_init = {
+ .constraints = {
+ .name = "VCAM",
+ .min_uV = 2500000,
+ .max_uV = 3000000,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_MODE,
+ .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
+ .boot_on = 1
+ },
+ .num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
+ .consumer_supplies = vcam_consumers,
+};
+
+static struct regulator_init_data vgen1_init = {
+ .constraints = {
+ .name = "VGEN1",
+ }
+};
+
+static struct regulator_init_data vgen2_init = {
+ .constraints = {
+ .name = "VGEN2",
+ .boot_on = 1,
+ }
+};
+
+static struct regulator_init_data vgen3_init = {
+ .constraints = {
+ .name = "VGEN3",
+ }
+};
+
+static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
+ { .id = MC13892_SW1, .init_data = &sw1_init },
+ { .id = MC13892_SW2, .init_data = &sw2_init },
+ { .id = MC13892_SW3, .init_data = &sw3_init },
+ { .id = MC13892_SW4, .init_data = &sw4_init },
+ { .id = MC13892_VIOHI, .init_data = &viohi_init },
+ { .id = MC13892_VPLL, .init_data = &vpll_init },
+ { .id = MC13892_VDIG, .init_data = &vdig_init },
+ { .id = MC13892_VUSB2, .init_data = &vusb2_init },
+ { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
+ { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
+ { .id = MC13892_VCAM, .init_data = &vcam_init },
+ { .id = MC13892_VGEN1, .init_data = &vgen1_init },
+ { .id = MC13892_VGEN2, .init_data = &vgen2_init },
+ { .id = MC13892_VGEN3, .init_data = &vgen3_init },
+ { .id = MC13892_VUSB, .init_data = &vusb_init },
+};
+
+static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
+ .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
+ .regulators = {
+ .num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
+ .regulators = mx35_3ds_regulators,
+ },
+};
+
+#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
+
+static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
+
+ I2C_BOARD_INFO("mc13892", 0x08),
+ .platform_data = &mx35_3ds_mc13892_data,
+ .irq = IMX_GPIO_TO_IRQ(GPIO_PMIC_INT),
+};
+
+static void __init imx35_3ds_init_mc13892(void)
+{
+ int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
+
+ if (ret) {
+ pr_err("failed to get pmic irq: %d\n", ret);
+ return;
+ }
+
+ i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
+}
+
static int mx35_3ds_otg_init(struct platform_device *pdev)
{
return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
@@ -412,6 +603,8 @@
imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
platform_device_register(&mx35_3ds_lcd);
+
+ imx35_3ds_init_mc13892();
}
static void __init mx35pdk_timer_init(void)
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 90ceab7..199764f 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -58,6 +58,28 @@
Say 'Y' here if you want your kernel to support the
Marvell DreamPlug (Flattened Device Tree).
+config MACH_ICONNECT_DT
+ bool "Iomega Iconnect (Flattened Device Tree)"
+ select ARCH_KIRKWOOD_DT
+ help
+ Say 'Y' here to enable Iomega Iconnect support.
+
+config MACH_DLINK_KIRKWOOD_DT
+ bool "D-Link Kirkwood-based NAS (Flattened Device Tree)"
+ select ARCH_KIRKWOOD_DT
+ help
+ Say 'Y' here if you want your kernel to support the
+ Kirkwood-based D-Link NASes such as DNS-320 & DNS-325,
+ using Flattened Device Tree.
+
+config MACH_IB62X0_DT
+ bool "RaidSonic IB-NAS6210, IB-NAS6220 (Flattened Device Tree)"
+ select ARCH_KIRKWOOD_DT
+ help
+ Say 'Y' here if you want your kernel to support the
+ RaidSonic IB-NAS6210 & IB-NAS6220 devices, using
+ Flattened Device Tree.
+
config MACH_TS219
bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
help
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index e299a95..d2b0590 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -22,3 +22,6 @@
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
obj-$(CONFIG_MACH_DREAMPLUG_DT) += board-dreamplug.o
+obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o
+obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o
+obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index 16f9385..02edbdf 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -3,3 +3,7 @@
initrd_phys-y := 0x00800000
dtb-$(CONFIG_MACH_DREAMPLUG_DT) += kirkwood-dreamplug.dtb
+dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
+dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
+dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
+dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c
new file mode 100644
index 0000000..58c2d68
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-dnskw.c
@@ -0,0 +1,275 @@
+/*
+ * Copyright 2012 (C), Jamie Lentin <jm@lentin.co.uk>
+ *
+ * arch/arm/mach-kirkwood/board-dnskw.c
+ *
+ * D-link DNS-320 & DNS-325 NAS Init for drivers not converted to
+ * flattened device tree yet.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/of.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/gpio-fan.h>
+#include <linux/leds.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/kirkwood.h>
+#include <mach/bridge-regs.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data dnskw_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static struct mv_sata_platform_data dnskw_sata_data = {
+ .n_ports = 2,
+};
+
+static unsigned int dnskw_mpp_config[] __initdata = {
+ MPP13_UART1_TXD, /* Custom ... */
+ MPP14_UART1_RXD, /* ... Controller (DNS-320 only) */
+ MPP20_SATA1_ACTn, /* LED: White Right HDD */
+ MPP21_SATA0_ACTn, /* LED: White Left HDD */
+ MPP24_GPIO,
+ MPP25_GPIO,
+ MPP26_GPIO, /* LED: Power */
+ MPP27_GPIO, /* LED: Red Right HDD */
+ MPP28_GPIO, /* LED: Red Left HDD */
+ MPP29_GPIO, /* LED: Red USB (DNS-325 only) */
+ MPP30_GPIO,
+ MPP31_GPIO,
+ MPP32_GPIO,
+ MPP33_GPO,
+ MPP34_GPIO, /* Button: Front power */
+ MPP35_GPIO, /* LED: Red USB (DNS-320 only) */
+ MPP36_GPIO, /* Power: Turn off board */
+ MPP37_GPIO, /* Power: Turn back on after power failure */
+ MPP38_GPIO,
+ MPP39_GPIO, /* Power: SATA0 */
+ MPP40_GPIO, /* Power: SATA1 */
+ MPP41_GPIO, /* SATA0 present */
+ MPP42_GPIO, /* SATA1 present */
+ MPP43_GPIO, /* LED: White USB */
+ MPP44_GPIO, /* Fan: Tachometer Pin */
+ MPP45_GPIO, /* Fan: high speed */
+ MPP46_GPIO, /* Fan: low speed */
+ MPP47_GPIO, /* Button: Back unmount */
+ MPP48_GPIO, /* Button: Back reset */
+ MPP49_GPIO, /* Temp Alarm (DNS-325) Pin of U5 (DNS-320) */
+ 0
+};
+
+static struct gpio_led dns325_led_pins[] = {
+ {
+ .name = "dns325:white:power",
+ .gpio = 26,
+ .active_low = 1,
+ .default_trigger = "default-on",
+ },
+ {
+ .name = "dns325:white:usb",
+ .gpio = 43,
+ .active_low = 1,
+ },
+ {
+ .name = "dns325:red:l_hdd",
+ .gpio = 28,
+ .active_low = 1,
+ },
+ {
+ .name = "dns325:red:r_hdd",
+ .gpio = 27,
+ .active_low = 1,
+ },
+ {
+ .name = "dns325:red:usb",
+ .gpio = 29,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_led_platform_data dns325_led_data = {
+ .num_leds = ARRAY_SIZE(dns325_led_pins),
+ .leds = dns325_led_pins,
+};
+
+static struct platform_device dns325_led_device = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &dns325_led_data,
+ },
+};
+
+static struct gpio_led dns320_led_pins[] = {
+ {
+ .name = "dns320:blue:power",
+ .gpio = 26,
+ .active_low = 1,
+ .default_trigger = "default-on",
+ },
+ {
+ .name = "dns320:blue:usb",
+ .gpio = 43,
+ .active_low = 1,
+ },
+ {
+ .name = "dns320:orange:l_hdd",
+ .gpio = 28,
+ .active_low = 1,
+ },
+ {
+ .name = "dns320:orange:r_hdd",
+ .gpio = 27,
+ .active_low = 1,
+ },
+ {
+ .name = "dns320:orange:usb",
+ .gpio = 35,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_led_platform_data dns320_led_data = {
+ .num_leds = ARRAY_SIZE(dns320_led_pins),
+ .leds = dns320_led_pins,
+};
+
+static struct platform_device dns320_led_device = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &dns320_led_data,
+ },
+};
+
+static struct i2c_board_info dns325_i2c_board_info[] __initdata = {
+ {
+ I2C_BOARD_INFO("lm75", 0x48),
+ },
+ /* Something at 0x0c also */
+};
+
+static struct gpio_keys_button dnskw_button_pins[] = {
+ {
+ .code = KEY_POWER,
+ .gpio = 34,
+ .desc = "Power button",
+ .active_low = 1,
+ },
+ {
+ .code = KEY_EJECTCD,
+ .gpio = 47,
+ .desc = "USB unmount button",
+ .active_low = 1,
+ },
+ {
+ .code = KEY_RESTART,
+ .gpio = 48,
+ .desc = "Reset button",
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_platform_data dnskw_button_data = {
+ .buttons = dnskw_button_pins,
+ .nbuttons = ARRAY_SIZE(dnskw_button_pins),
+};
+
+static struct platform_device dnskw_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &dnskw_button_data,
+ }
+};
+
+/* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */
+static struct gpio_fan_speed dnskw_fan_speed[] = {
+ { 0, 0 },
+ { 3000, 1 },
+ { 6000, 2 },
+};
+static unsigned dnskw_fan_pins[] = {46, 45};
+
+static struct gpio_fan_platform_data dnskw_fan_data = {
+ .num_ctrl = ARRAY_SIZE(dnskw_fan_pins),
+ .ctrl = dnskw_fan_pins,
+ .num_speed = ARRAY_SIZE(dnskw_fan_speed),
+ .speed = dnskw_fan_speed,
+};
+
+static struct platform_device dnskw_fan_device = {
+ .name = "gpio-fan",
+ .id = -1,
+ .dev = {
+ .platform_data = &dnskw_fan_data,
+ },
+};
+
+static void dnskw_power_off(void)
+{
+ gpio_set_value(36, 1);
+}
+
+/* Register any GPIO for output and set the value */
+static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
+{
+ if (gpio_request(gpio, name) == 0 &&
+ gpio_direction_output(gpio, 0) == 0) {
+ gpio_set_value(gpio, def);
+ if (gpio_export(gpio, 0) != 0)
+ pr_err("dnskw: Failed to export GPIO %s\n", name);
+ } else
+ pr_err("dnskw: Failed to register %s\n", name);
+}
+
+void __init dnskw_init(void)
+{
+ kirkwood_mpp_conf(dnskw_mpp_config);
+
+ kirkwood_ehci_init();
+ kirkwood_ge00_init(&dnskw_ge00_data);
+ kirkwood_sata_init(&dnskw_sata_data);
+ kirkwood_i2c_init();
+
+ platform_device_register(&dnskw_button_device);
+ platform_device_register(&dnskw_fan_device);
+
+ if (of_machine_is_compatible("dlink,dns-325")) {
+ i2c_register_board_info(0, dns325_i2c_board_info,
+ ARRAY_SIZE(dns325_i2c_board_info));
+ platform_device_register(&dns325_led_device);
+
+ } else if (of_machine_is_compatible("dlink,dns-320"))
+ platform_device_register(&dns320_led_device);
+
+ /* Register power-off GPIO. */
+ if (gpio_request(36, "dnskw:power:off") == 0
+ && gpio_direction_output(36, 0) == 0)
+ pm_power_off = dnskw_power_off;
+ else
+ pr_err("dnskw: failed to configure power-off GPIO\n");
+
+ /* Ensure power is supplied to both HDDs */
+ dnskw_gpio_register(39, "dnskw:power:sata0", 1);
+ dnskw_gpio_register(40, "dnskw:power:sata1", 1);
+
+ /* Set NAS to turn back on after a power failure */
+ dnskw_gpio_register(37, "dnskw:power:recover", 1);
+}
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index f7fe1b9..10d1969 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -56,11 +56,24 @@
if (of_machine_is_compatible("globalscale,dreamplug"))
dreamplug_init();
+ if (of_machine_is_compatible("dlink,dns-kirkwood"))
+ dnskw_init();
+
+ if (of_machine_is_compatible("iom,iconnect"))
+ iconnect_init();
+
+ if (of_machine_is_compatible("raidsonic,ib-nas62x0"))
+ ib62x0_init();
+
of_platform_populate(NULL, kirkwood_dt_match_table, NULL, NULL);
}
static const char *kirkwood_dt_board_compat[] = {
"globalscale,dreamplug",
+ "dlink,dns-320",
+ "dlink,dns-325",
+ "iom,iconnect",
+ "raidsonic,ib-nas62x0",
NULL
};
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c
new file mode 100644
index 0000000..eddf1df
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-ib62x0.c
@@ -0,0 +1,143 @@
+/*
+ * Copyright 2012 (C), Simon Baatz <gmbnomis@gmail.com>
+ *
+ * arch/arm/mach-kirkwood/board-ib62x0.c
+ *
+ * RaidSonic ICY BOX IB-NAS6210 & IB-NAS6220 init for drivers not
+ * converted to flattened device tree yet.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/partitions.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include "common.h"
+#include "mpp.h"
+
+#define IB62X0_GPIO_POWER_OFF 24
+
+static struct mv643xx_eth_platform_data ib62x0_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static struct mv_sata_platform_data ib62x0_sata_data = {
+ .n_ports = 2,
+};
+
+static unsigned int ib62x0_mpp_config[] __initdata = {
+ MPP0_NF_IO2,
+ MPP1_NF_IO3,
+ MPP2_NF_IO4,
+ MPP3_NF_IO5,
+ MPP4_NF_IO6,
+ MPP5_NF_IO7,
+ MPP18_NF_IO0,
+ MPP19_NF_IO1,
+ MPP22_GPIO, /* OS LED red */
+ MPP24_GPIO, /* Power off device */
+ MPP25_GPIO, /* OS LED green */
+ MPP27_GPIO, /* USB transfer LED */
+ MPP28_GPIO, /* Reset button */
+ MPP29_GPIO, /* USB Copy button */
+ 0
+};
+
+static struct gpio_led ib62x0_led_pins[] = {
+ {
+ .name = "ib62x0:green:os",
+ .default_trigger = "default-on",
+ .gpio = 25,
+ .active_low = 0,
+ },
+ {
+ .name = "ib62x0:red:os",
+ .default_trigger = "none",
+ .gpio = 22,
+ .active_low = 0,
+ },
+ {
+ .name = "ib62x0:red:usb_copy",
+ .default_trigger = "none",
+ .gpio = 27,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_led_platform_data ib62x0_led_data = {
+ .leds = ib62x0_led_pins,
+ .num_leds = ARRAY_SIZE(ib62x0_led_pins),
+};
+
+static struct platform_device ib62x0_led_device = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &ib62x0_led_data,
+ }
+};
+
+static struct gpio_keys_button ib62x0_button_pins[] = {
+ {
+ .code = KEY_COPY,
+ .gpio = 29,
+ .desc = "USB Copy",
+ .active_low = 1,
+ },
+ {
+ .code = KEY_RESTART,
+ .gpio = 28,
+ .desc = "Reset",
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_platform_data ib62x0_button_data = {
+ .buttons = ib62x0_button_pins,
+ .nbuttons = ARRAY_SIZE(ib62x0_button_pins),
+};
+
+static struct platform_device ib62x0_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &ib62x0_button_data,
+ }
+};
+
+static void ib62x0_power_off(void)
+{
+ gpio_set_value(IB62X0_GPIO_POWER_OFF, 1);
+}
+
+void __init ib62x0_init(void)
+{
+ /*
+ * Basic setup. Needs to be called early.
+ */
+ kirkwood_mpp_conf(ib62x0_mpp_config);
+
+ kirkwood_ehci_init();
+ kirkwood_ge00_init(&ib62x0_ge00_data);
+ kirkwood_sata_init(&ib62x0_sata_data);
+ platform_device_register(&ib62x0_led_device);
+ platform_device_register(&ib62x0_button_device);
+ if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 &&
+ gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0)
+ pm_power_off = ib62x0_power_off;
+ else
+ pr_err("board-ib62x0: failed to configure power-off GPIO\n");
+}
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
new file mode 100644
index 0000000..2222c57
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -0,0 +1,165 @@
+/*
+ * arch/arm/mach-kirkwood/board-iconnect.c
+ *
+ * Iomega i-connect Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mv643xx_eth_platform_data iconnect_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(11),
+};
+
+static struct gpio_led iconnect_led_pins[] = {
+ {
+ .name = "led_level",
+ .gpio = 41,
+ .default_trigger = "default-on",
+ }, {
+ .name = "power:blue",
+ .gpio = 42,
+ .default_trigger = "timer",
+ }, {
+ .name = "power:red",
+ .gpio = 43,
+ }, {
+ .name = "usb1:blue",
+ .gpio = 44,
+ }, {
+ .name = "usb2:blue",
+ .gpio = 45,
+ }, {
+ .name = "usb3:blue",
+ .gpio = 46,
+ }, {
+ .name = "usb4:blue",
+ .gpio = 47,
+ }, {
+ .name = "otb:blue",
+ .gpio = 48,
+ },
+};
+
+static struct gpio_led_platform_data iconnect_led_data = {
+ .leds = iconnect_led_pins,
+ .num_leds = ARRAY_SIZE(iconnect_led_pins),
+ .gpio_blink_set = orion_gpio_led_blink_set,
+};
+
+static struct platform_device iconnect_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &iconnect_led_data,
+ }
+};
+
+static unsigned int iconnect_mpp_config[] __initdata = {
+ MPP12_GPIO,
+ MPP35_GPIO,
+ MPP41_GPIO,
+ MPP42_GPIO,
+ MPP43_GPIO,
+ MPP44_GPIO,
+ MPP45_GPIO,
+ MPP46_GPIO,
+ MPP47_GPIO,
+ MPP48_GPIO,
+ 0
+};
+
+static struct i2c_board_info __initdata iconnect_board_info[] = {
+ {
+ I2C_BOARD_INFO("lm63", 0x4c),
+ },
+};
+
+static struct mtd_partition iconnect_nand_parts[] = {
+ {
+ .name = "flash",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+/* yikes... theses are the original input buttons */
+/* but I'm not convinced by the sw event choices */
+static struct gpio_keys_button iconnect_buttons[] = {
+ {
+ .type = EV_SW,
+ .code = SW_LID,
+ .gpio = 12,
+ .desc = "Reset Button",
+ .active_low = 1,
+ .debounce_interval = 100,
+ }, {
+ .type = EV_SW,
+ .code = SW_TABLET_MODE,
+ .gpio = 35,
+ .desc = "OTB Button",
+ .active_low = 1,
+ .debounce_interval = 100,
+ },
+};
+
+static struct gpio_keys_platform_data iconnect_button_data = {
+ .buttons = iconnect_buttons,
+ .nbuttons = ARRAY_SIZE(iconnect_buttons),
+};
+
+static struct platform_device iconnect_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &iconnect_button_data,
+ },
+};
+
+void __init iconnect_init(void)
+{
+ kirkwood_mpp_conf(iconnect_mpp_config);
+ kirkwood_nand_init(ARRAY_AND_SIZE(iconnect_nand_parts), 25);
+ kirkwood_i2c_init();
+ i2c_register_board_info(0, iconnect_board_info,
+ ARRAY_SIZE(iconnect_board_info));
+
+ kirkwood_ehci_init();
+ kirkwood_ge00_init(&iconnect_ge00_data);
+
+ platform_device_register(&iconnect_button_device);
+ platform_device_register(&iconnect_leds);
+}
+
+static int __init iconnect_pci_init(void)
+{
+ if (of_machine_is_compatible("iom,iconnect"))
+ kirkwood_pcie_init(KW_PCIE0);
+ return 0;
+}
+subsys_initcall(iconnect_pci_init);
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index a02cae8..3ad0373 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -15,6 +15,7 @@
#include <linux/ata_platform.h>
#include <linux/mtd/nand.h>
#include <linux/dma-mapping.h>
+#include <linux/of.h>
#include <net/dsa.h>
#include <asm/page.h>
#include <asm/timex.h>
@@ -482,6 +483,9 @@
unsigned int curr = readl(CLOCK_GATING_CTRL);
u32 dev, rev;
+#ifdef CONFIG_OF
+ struct device_node *np;
+#endif
kirkwood_pcie_id(&dev, &rev);
printk(KERN_DEBUG "Gating clock of unused units\n");
printk(KERN_DEBUG "before: 0x%08x\n", curr);
@@ -489,6 +493,14 @@
/* Make sure those units are accessible */
writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
+#ifdef CONFIG_OF
+ np = of_find_compatible_node(NULL, NULL, "mrvl,orion-nand");
+ if (np && of_device_is_available(np)) {
+ kirkwood_clk_ctrl |= CGC_RUNIT;
+ of_node_put(np);
+ }
+#endif
+
/* For SATA: first shutdown the phy */
if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
/* Disable PLL and IVREF */
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index fa8e768..a34c41a 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -58,6 +58,24 @@
static inline void dreamplug_init(void) {};
#endif
+#ifdef CONFIG_MACH_DLINK_KIRKWOOD_DT
+void dnskw_init(void);
+#else
+static inline void dnskw_init(void) {};
+#endif
+
+#ifdef CONFIG_MACH_ICONNECT_DT
+void iconnect_init(void);
+#else
+static inline void iconnect_init(void) {};
+#endif
+
+#ifdef CONFIG_MACH_IB62X0_DT
+void ib62x0_init(void);
+#else
+static inline void ib62x0_init(void) {};
+#endif
+
/* early init functions not converted to fdt yet */
char *kirkwood_id(void);
void kirkwood_l2_init(void);
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index 5a90b9a..fa03974 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -113,4 +113,11 @@
select CPU_PJ4
help
Select code specific to MMP2. MMP2 is ARMv7 compatible.
+
+config USB_EHCI_MV_U2O
+ bool "EHCI support for PXA USB OTG controller"
+ depends on USB_EHCI_MV
+ help
+ Enables support for OTG controller which can be switched to host mode.
+
endif
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index bf5d8e1..223090b 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -17,6 +17,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/interrupt.h>
+#include <linux/platform_data/mv_usb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -221,6 +222,21 @@
.debounce_interval = 30,
};
+#if defined(CONFIG_USB_EHCI_MV)
+static char *pxa168_sph_clock_name[] = {
+ [0] = "PXA168-USBCLK",
+};
+
+static struct mv_usb_platform_data pxa168_sph_pdata = {
+ .clknum = 1,
+ .clkname = pxa168_sph_clock_name,
+ .mode = MV_USB_MODE_HOST,
+ .phy_init = pxa_usb_phy_init,
+ .phy_deinit = pxa_usb_phy_deinit,
+ .set_vbus = NULL,
+};
+#endif
+
static void __init common_init(void)
{
mfp_config(ARRAY_AND_SIZE(common_pin_config));
@@ -236,6 +252,10 @@
/* off-chip devices */
platform_device_register(&smc91x_device);
+
+#if defined(CONFIG_USB_EHCI_MV)
+ pxa168_add_usb_host(&pxa168_sph_pdata);
+#endif
}
MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
index 191d9de..dd2d8b1 100644
--- a/arch/arm/mach-mmp/devices.c
+++ b/arch/arm/mach-mmp/devices.c
@@ -9,9 +9,13 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
+#include <linux/delay.h>
#include <asm/irq.h>
+#include <mach/irqs.h>
#include <mach/devices.h>
+#include <mach/cputype.h>
+#include <mach/regs-usb.h>
int __init pxa_register_device(struct pxa_device_desc *desc,
void *data, size_t size)
@@ -67,3 +71,281 @@
return platform_device_add(pdev);
}
+
+#if defined(CONFIG_USB) || defined(CONFIG_USB_GADGET)
+
+/*****************************************************************************
+ * The registers read/write routines
+ *****************************************************************************/
+
+static unsigned int u2o_get(void __iomem *base, unsigned int offset)
+{
+ return readl_relaxed(base + offset);
+}
+
+static void u2o_set(void __iomem *base, unsigned int offset,
+ unsigned int value)
+{
+ u32 reg;
+
+ reg = readl_relaxed(base + offset);
+ reg |= value;
+ writel_relaxed(reg, base + offset);
+ readl_relaxed(base + offset);
+}
+
+static void u2o_clear(void __iomem *base, unsigned int offset,
+ unsigned int value)
+{
+ u32 reg;
+
+ reg = readl_relaxed(base + offset);
+ reg &= ~value;
+ writel_relaxed(reg, base + offset);
+ readl_relaxed(base + offset);
+}
+
+static void u2o_write(void __iomem *base, unsigned int offset,
+ unsigned int value)
+{
+ writel_relaxed(value, base + offset);
+ readl_relaxed(base + offset);
+}
+
+#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV)
+
+#if defined(CONFIG_CPU_PXA910) || defined(CONFIG_CPU_PXA168)
+
+static DEFINE_MUTEX(phy_lock);
+static int phy_init_cnt;
+
+static int usb_phy_init_internal(void __iomem *base)
+{
+ int loops;
+
+ pr_info("Init usb phy!!!\n");
+
+ /* Initialize the USB PHY power */
+ if (cpu_is_pxa910()) {
+ u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
+ | (1<<UTMI_CTRL_PU_REF_SHIFT));
+ }
+
+ u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
+ u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
+
+ /* UTMI_PLL settings */
+ u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
+ | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK
+ | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK
+ | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);
+
+ u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
+ | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT
+ | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT
+ | 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT);
+
+ /* UTMI_TX */
+ u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
+ | UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK
+ | UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK
+ | UTMI_TX_AMP_MASK);
+ u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
+ | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT
+ | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT);
+
+ /* UTMI_RX */
+ u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
+ | UTMI_REG_SQ_LENGTH_MASK);
+ u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
+ | 2<<UTMI_REG_SQ_LENGTH_SHIFT);
+
+ /* UTMI_IVREF */
+ if (cpu_is_pxa168())
+ /* fixing Microsoft Altair board interface with NEC hub issue -
+ * Set UTMI_IVREF from 0x4a3 to 0x4bf */
+ u2o_write(base, UTMI_IVREF, 0x4bf);
+
+ /* toggle VCOCAL_START bit of UTMI_PLL */
+ udelay(200);
+ u2o_set(base, UTMI_PLL, VCOCAL_START);
+ udelay(40);
+ u2o_clear(base, UTMI_PLL, VCOCAL_START);
+
+ /* toggle REG_RCAL_START bit of UTMI_TX */
+ udelay(400);
+ u2o_set(base, UTMI_TX, REG_RCAL_START);
+ udelay(40);
+ u2o_clear(base, UTMI_TX, REG_RCAL_START);
+ udelay(400);
+
+ /* Make sure PHY PLL is ready */
+ loops = 0;
+ while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
+ mdelay(1);
+ loops++;
+ if (loops > 100) {
+ printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
+ u2o_get(base, UTMI_PLL));
+ break;
+ }
+ }
+
+ if (cpu_is_pxa168()) {
+ u2o_set(base, UTMI_RESERVE, 1 << 5);
+ /* Turn on UTMI PHY OTG extension */
+ u2o_write(base, UTMI_OTG_ADDON, 1);
+ }
+
+ return 0;
+}
+
+static int usb_phy_deinit_internal(void __iomem *base)
+{
+ pr_info("Deinit usb phy!!!\n");
+
+ if (cpu_is_pxa168())
+ u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);
+
+ u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
+ u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
+ u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
+ u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
+ u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
+
+ return 0;
+}
+
+int pxa_usb_phy_init(void __iomem *phy_reg)
+{
+ mutex_lock(&phy_lock);
+ if (phy_init_cnt++ == 0)
+ usb_phy_init_internal(phy_reg);
+ mutex_unlock(&phy_lock);
+ return 0;
+}
+
+void pxa_usb_phy_deinit(void __iomem *phy_reg)
+{
+ WARN_ON(phy_init_cnt == 0);
+
+ mutex_lock(&phy_lock);
+ if (--phy_init_cnt == 0)
+ usb_phy_deinit_internal(phy_reg);
+ mutex_unlock(&phy_lock);
+}
+#endif
+#endif
+#endif
+
+#ifdef CONFIG_USB_SUPPORT
+static u64 usb_dma_mask = ~(u32)0;
+
+#ifdef CONFIG_USB_MV_UDC
+struct resource pxa168_u2o_resources[] = {
+ /* regbase */
+ [0] = {
+ .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
+ .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "capregs",
+ },
+ /* phybase */
+ [1] = {
+ .start = PXA168_U2O_PHYBASE,
+ .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "phyregs",
+ },
+ [2] = {
+ .start = IRQ_PXA168_USB1,
+ .end = IRQ_PXA168_USB1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa168_device_u2o = {
+ .name = "mv-udc",
+ .id = -1,
+ .resource = pxa168_u2o_resources,
+ .num_resources = ARRAY_SIZE(pxa168_u2o_resources),
+ .dev = {
+ .dma_mask = &usb_dma_mask,
+ .coherent_dma_mask = 0xffffffff,
+ }
+};
+#endif /* CONFIG_USB_MV_UDC */
+
+#ifdef CONFIG_USB_EHCI_MV_U2O
+struct resource pxa168_u2oehci_resources[] = {
+ /* regbase */
+ [0] = {
+ .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
+ .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "capregs",
+ },
+ /* phybase */
+ [1] = {
+ .start = PXA168_U2O_PHYBASE,
+ .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "phyregs",
+ },
+ [2] = {
+ .start = IRQ_PXA168_USB1,
+ .end = IRQ_PXA168_USB1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa168_device_u2oehci = {
+ .name = "pxa-u2oehci",
+ .id = -1,
+ .dev = {
+ .dma_mask = &usb_dma_mask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+
+ .num_resources = ARRAY_SIZE(pxa168_u2oehci_resources),
+ .resource = pxa168_u2oehci_resources,
+};
+#endif
+
+#if defined(CONFIG_USB_MV_OTG)
+struct resource pxa168_u2ootg_resources[] = {
+ /* regbase */
+ [0] = {
+ .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
+ .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "capregs",
+ },
+ /* phybase */
+ [1] = {
+ .start = PXA168_U2O_PHYBASE,
+ .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
+ .flags = IORESOURCE_MEM,
+ .name = "phyregs",
+ },
+ [2] = {
+ .start = IRQ_PXA168_USB1,
+ .end = IRQ_PXA168_USB1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device pxa168_device_u2ootg = {
+ .name = "mv-otg",
+ .id = -1,
+ .dev = {
+ .dma_mask = &usb_dma_mask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+
+ .num_resources = ARRAY_SIZE(pxa168_u2ootg_resources),
+ .resource = pxa168_u2ootg_resources,
+};
+#endif /* CONFIG_USB_MV_OTG */
+
+#endif
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
index d0ec7da..21217ef 100644
--- a/arch/arm/mach-mmp/include/mach/devices.h
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -50,4 +50,7 @@
}
extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
+extern int pxa_usb_phy_init(void __iomem *phy_reg);
+extern void pxa_usb_phy_deinit(void __iomem *phy_reg);
+
#endif /* __MACH_DEVICE_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index dc03d58..09dcd6e 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -16,6 +16,7 @@
#include <plat/pxa27x_keypad.h>
#include <mach/cputype.h>
#include <linux/pxa168_eth.h>
+#include <linux/platform_data/mv_usb.h>
extern struct pxa_device_desc pxa168_device_uart1;
extern struct pxa_device_desc pxa168_device_uart2;
@@ -36,12 +37,9 @@
extern struct pxa_device_desc pxa168_device_keypad;
extern struct pxa_device_desc pxa168_device_eth;
-struct pxa168_usb_pdata {
- /* If NULL, default phy init routine for PXA168 would be called */
- int (*phy_init)(void __iomem *usb_phy_reg_base);
-};
/* pdata can be NULL */
-int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
+extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);
+
extern struct platform_device pxa168_device_gpio;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index e2e1f1e..793634c 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -20,6 +20,9 @@
extern struct pxa_device_desc pxa910_device_pwm3;
extern struct pxa_device_desc pxa910_device_pwm4;
extern struct pxa_device_desc pxa910_device_nand;
+extern struct platform_device pxa168_device_u2o;
+extern struct platform_device pxa168_device_u2ootg;
+extern struct platform_device pxa168_device_u2oehci;
extern struct platform_device pxa910_device_gpio;
extern struct platform_device pxa910_device_rtc;
diff --git a/arch/arm/mach-mmp/include/mach/regs-usb.h b/arch/arm/mach-mmp/include/mach/regs-usb.h
new file mode 100644
index 0000000..b047bf4
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-usb.h
@@ -0,0 +1,253 @@
+/*
+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_ARCH_REGS_USB_H
+#define __ASM_ARCH_REGS_USB_H
+
+#define PXA168_U2O_REGBASE (0xd4208000)
+#define PXA168_U2O_PHYBASE (0xd4207000)
+
+#define PXA168_U2H_REGBASE (0xd4209000)
+#define PXA168_U2H_PHYBASE (0xd4206000)
+
+#define MMP3_HSIC1_REGBASE (0xf0001000)
+#define MMP3_HSIC1_PHYBASE (0xf0001800)
+
+#define MMP3_HSIC2_REGBASE (0xf0002000)
+#define MMP3_HSIC2_PHYBASE (0xf0002800)
+
+#define MMP3_FSIC_REGBASE (0xf0003000)
+#define MMP3_FSIC_PHYBASE (0xf0003800)
+
+
+#define USB_REG_RANGE (0x1ff)
+#define USB_PHY_RANGE (0xff)
+
+/* registers */
+#define U2x_CAPREGS_OFFSET 0x100
+
+/* phy regs */
+#define UTMI_REVISION 0x0
+#define UTMI_CTRL 0x4
+#define UTMI_PLL 0x8
+#define UTMI_TX 0xc
+#define UTMI_RX 0x10
+#define UTMI_IVREF 0x14
+#define UTMI_T0 0x18
+#define UTMI_T1 0x1c
+#define UTMI_T2 0x20
+#define UTMI_T3 0x24
+#define UTMI_T4 0x28
+#define UTMI_T5 0x2c
+#define UTMI_RESERVE 0x30
+#define UTMI_USB_INT 0x34
+#define UTMI_DBG_CTL 0x38
+#define UTMI_OTG_ADDON 0x3c
+
+/* For UTMICTRL Register */
+#define UTMI_CTRL_USB_CLK_EN (1 << 31)
+/* pxa168 */
+#define UTMI_CTRL_SUSPEND_SET1 (1 << 30)
+#define UTMI_CTRL_SUSPEND_SET2 (1 << 29)
+#define UTMI_CTRL_RXBUF_PDWN (1 << 24)
+#define UTMI_CTRL_TXBUF_PDWN (1 << 11)
+
+#define UTMI_CTRL_INPKT_DELAY_SHIFT 30
+#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28
+#define UTMI_CTRL_PU_REF_SHIFT 20
+#define UTMI_CTRL_ARC_PULLDN_SHIFT 12
+#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1
+#define UTMI_CTRL_PWR_UP_SHIFT 0
+
+/* For UTMI_PLL Register */
+#define UTMI_PLL_PLLCALI12_SHIFT 29
+#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29)
+
+#define UTMI_PLL_PLLVDD18_SHIFT 27
+#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27)
+
+#define UTMI_PLL_PLLVDD12_SHIFT 25
+#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25)
+
+#define UTMI_PLL_CLK_BLK_EN_SHIFT 24
+#define CLK_BLK_EN (0x1 << 24)
+#define PLL_READY (0x1 << 23)
+#define KVCO_EXT (0x1 << 22)
+#define VCOCAL_START (0x1 << 21)
+
+#define UTMI_PLL_KVCO_SHIFT 15
+#define UTMI_PLL_KVCO_MASK (0x7 << 15)
+
+#define UTMI_PLL_ICP_SHIFT 12
+#define UTMI_PLL_ICP_MASK (0x7 << 12)
+
+#define UTMI_PLL_FBDIV_SHIFT 4
+#define UTMI_PLL_FBDIV_MASK (0xFF << 4)
+
+#define UTMI_PLL_REFDIV_SHIFT 0
+#define UTMI_PLL_REFDIV_MASK (0xF << 0)
+
+/* For UTMI_TX Register */
+#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27
+#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27)
+
+#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26
+#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26)
+
+#define UTMI_TX_TXVDD12_SHIFT 22
+#define UTMI_TX_TXVDD12_MASK (0x3 << 22)
+
+#define UTMI_TX_CK60_PHSEL_SHIFT 17
+#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17)
+
+#define UTMI_TX_IMPCAL_VTH_SHIFT 14
+#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14)
+
+#define REG_RCAL_START (0x1 << 12)
+
+#define UTMI_TX_LOW_VDD_EN_SHIFT 11
+
+#define UTMI_TX_AMP_SHIFT 0
+#define UTMI_TX_AMP_MASK (0x7 << 0)
+
+/* For UTMI_RX Register */
+#define UTMI_REG_SQ_LENGTH_SHIFT 15
+#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15)
+
+#define UTMI_RX_SQ_THRESH_SHIFT 4
+#define UTMI_RX_SQ_THRESH_MASK (0xf << 4)
+
+#define UTMI_OTG_ADDON_OTG_ON (1 << 0)
+
+/* For MMP3 USB Phy */
+#define USB2_PLL_REG0 0x4
+#define USB2_PLL_REG1 0x8
+#define USB2_TX_REG0 0x10
+#define USB2_TX_REG1 0x14
+#define USB2_TX_REG2 0x18
+#define USB2_RX_REG0 0x20
+#define USB2_RX_REG1 0x24
+#define USB2_RX_REG2 0x28
+#define USB2_ANA_REG0 0x30
+#define USB2_ANA_REG1 0x34
+#define USB2_ANA_REG2 0x38
+#define USB2_DIG_REG0 0x3C
+#define USB2_DIG_REG1 0x40
+#define USB2_DIG_REG2 0x44
+#define USB2_DIG_REG3 0x48
+#define USB2_TEST_REG0 0x4C
+#define USB2_TEST_REG1 0x50
+#define USB2_TEST_REG2 0x54
+#define USB2_CHARGER_REG0 0x58
+#define USB2_OTG_REG0 0x5C
+#define USB2_PHY_MON0 0x60
+#define USB2_RESETVE_REG0 0x64
+#define USB2_ICID_REG0 0x78
+#define USB2_ICID_REG1 0x7C
+
+/* USB2_PLL_REG0 */
+/* This is for Ax stepping */
+#define USB2_PLL_FBDIV_SHIFT_MMP3 0
+#define USB2_PLL_FBDIV_MASK_MMP3 (0xFF << 0)
+
+#define USB2_PLL_REFDIV_SHIFT_MMP3 8
+#define USB2_PLL_REFDIV_MASK_MMP3 (0xF << 8)
+
+#define USB2_PLL_VDD12_SHIFT_MMP3 12
+#define USB2_PLL_VDD18_SHIFT_MMP3 14
+
+/* This is for B0 stepping */
+#define USB2_PLL_FBDIV_SHIFT_MMP3_B0 0
+#define USB2_PLL_REFDIV_SHIFT_MMP3_B0 9
+#define USB2_PLL_VDD18_SHIFT_MMP3_B0 14
+#define USB2_PLL_FBDIV_MASK_MMP3_B0 0x01FF
+#define USB2_PLL_REFDIV_MASK_MMP3_B0 0x3E00
+
+#define USB2_PLL_CAL12_SHIFT_MMP3 0
+#define USB2_PLL_CALI12_MASK_MMP3 (0x3 << 0)
+
+#define USB2_PLL_VCOCAL_START_SHIFT_MMP3 2
+
+#define USB2_PLL_KVCO_SHIFT_MMP3 4
+#define USB2_PLL_KVCO_MASK_MMP3 (0x7<<4)
+
+#define USB2_PLL_ICP_SHIFT_MMP3 8
+#define USB2_PLL_ICP_MASK_MMP3 (0x7<<8)
+
+#define USB2_PLL_LOCK_BYPASS_SHIFT_MMP3 12
+
+#define USB2_PLL_PU_PLL_SHIFT_MMP3 13
+#define USB2_PLL_PU_PLL_MASK (0x1 << 13)
+
+#define USB2_PLL_READY_MASK_MMP3 (0x1 << 15)
+
+/* USB2_TX_REG0 */
+#define USB2_TX_IMPCAL_VTH_SHIFT_MMP3 8
+#define USB2_TX_IMPCAL_VTH_MASK_MMP3 (0x7 << 8)
+
+#define USB2_TX_RCAL_START_SHIFT_MMP3 13
+
+/* USB2_TX_REG1 */
+#define USB2_TX_CK60_PHSEL_SHIFT_MMP3 0
+#define USB2_TX_CK60_PHSEL_MASK_MMP3 (0xf << 0)
+
+#define USB2_TX_AMP_SHIFT_MMP3 4
+#define USB2_TX_AMP_MASK_MMP3 (0x7 << 4)
+
+#define USB2_TX_VDD12_SHIFT_MMP3 8
+#define USB2_TX_VDD12_MASK_MMP3 (0x3 << 8)
+
+/* USB2_TX_REG2 */
+#define USB2_TX_DRV_SLEWRATE_SHIFT 10
+
+/* USB2_RX_REG0 */
+#define USB2_RX_SQ_THRESH_SHIFT_MMP3 4
+#define USB2_RX_SQ_THRESH_MASK_MMP3 (0xf << 4)
+
+#define USB2_RX_SQ_LENGTH_SHIFT_MMP3 10
+#define USB2_RX_SQ_LENGTH_MASK_MMP3 (0x3 << 10)
+
+/* USB2_ANA_REG1*/
+#define USB2_ANA_PU_ANA_SHIFT_MMP3 14
+
+/* USB2_OTG_REG0 */
+#define USB2_OTG_PU_OTG_SHIFT_MMP3 3
+
+/* fsic registers */
+#define FSIC_MISC 0x4
+#define FSIC_INT 0x28
+#define FSIC_CTRL 0x30
+
+/* HSIC registers */
+#define HSIC_PAD_CTRL 0x4
+
+#define HSIC_CTRL 0x8
+#define HSIC_CTRL_HSIC_ENABLE (1<<7)
+#define HSIC_CTRL_PLL_BYPASS (1<<4)
+
+#define TEST_GRP_0 0xc
+#define TEST_GRP_1 0x10
+
+#define HSIC_INT 0x14
+#define HSIC_INT_READY_INT_EN (1<<10)
+#define HSIC_INT_CONNECT_INT_EN (1<<9)
+#define HSIC_INT_CORE_INT_EN (1<<8)
+#define HSIC_INT_HS_READY (1<<2)
+#define HSIC_INT_CONNECT (1<<1)
+#define HSIC_INT_CORE (1<<0)
+
+#define HSIC_CONFIG 0x18
+#define USBHSIC_CTRL 0x20
+
+#define HSIC_USB_CTRL 0x28
+#define HSIC_USB_CTRL_CLKEN 1
+#define HSIC_USB_CLK_PHY 0x0
+#define HSIC_USB_CLK_PMU 0x1
+
+#endif /* __ASM_ARCH_PXA_U2O_H */
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index b24d2c3..62d787c 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -14,6 +14,7 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/mv_usb.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
@@ -27,6 +28,7 @@
#include <mach/mfp.h>
#include <linux/dma-mapping.h>
#include <mach/pxa168.h>
+#include <mach/regs-usb.h>
#include "common.h"
#include "clock.h"
@@ -93,7 +95,7 @@
INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
- INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
+ INIT_CLKREG(&clk_usb, NULL, "PXA168-USBCLK"),
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
@@ -184,17 +186,17 @@
struct resource pxa168_usb_host_resources[] = {
/* USB Host conroller register base */
[0] = {
- .start = 0xd4209000,
- .end = 0xd4209000 + 0x200,
+ .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
+ .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
.flags = IORESOURCE_MEM,
- .name = "pxa168-usb-host",
+ .name = "capregs",
},
/* USB PHY register base */
[1] = {
- .start = 0xd4206000,
- .end = 0xd4206000 + 0xff,
+ .start = PXA168_U2H_PHYBASE,
+ .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
.flags = IORESOURCE_MEM,
- .name = "pxa168-usb-phy",
+ .name = "phyregs",
},
[2] = {
.start = IRQ_PXA168_USB2,
@@ -205,7 +207,7 @@
static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
struct platform_device pxa168_device_usb_host = {
- .name = "pxa168-ehci",
+ .name = "pxa-sph",
.id = -1,
.dev = {
.dma_mask = &pxa168_usb_host_dmamask,
@@ -216,7 +218,7 @@
.resource = pxa168_usb_host_resources,
};
-int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
+int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
{
pxa168_device_usb_host.dev.platform_data = pdata;
return platform_device_register(&pxa168_device_usb_host);
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 43f8bcc..6da52e9 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -109,7 +109,7 @@
INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
- INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
+ INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 3fc9ed2..2662153 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -17,6 +17,7 @@
#include <linux/interrupt.h>
#include <linux/i2c/pca953x.h>
#include <linux/gpio.h>
+#include <linux/platform_data/mv_usb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -25,6 +26,7 @@
#include <mach/mfp-pxa910.h>
#include <mach/pxa910.h>
#include <mach/irqs.h>
+#include <mach/regs-usb.h>
#include "common.h"
@@ -144,6 +146,26 @@
},
};
+#ifdef CONFIG_USB_SUPPORT
+#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
+
+static char *pxa910_usb_clock_name[] = {
+ [0] = "U2OCLK",
+};
+
+static struct mv_usb_platform_data ttc_usb_pdata = {
+ .clknum = 1,
+ .clkname = pxa910_usb_clock_name,
+ .vbus = NULL,
+ .mode = MV_USB_MODE_OTG,
+ .otg_force_a_bus_req = 1,
+ .phy_init = pxa_usb_phy_init,
+ .phy_deinit = pxa_usb_phy_deinit,
+ .set_vbus = NULL,
+};
+#endif
+#endif
+
static void __init ttc_dkb_init(void)
{
mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));
@@ -154,6 +176,21 @@
/* off-chip devices */
pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info));
platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
+
+#ifdef CONFIG_USB_MV_UDC
+ pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata;
+ platform_device_register(&pxa168_device_u2o);
+#endif
+
+#ifdef CONFIG_USB_EHCI_MV_U2O
+ pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata;
+ platform_device_register(&pxa168_device_u2oehci);
+#endif
+
+#ifdef CONFIG_USB_MV_OTG
+ pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata;
+ platform_device_register(&pxa168_device_u2ootg);
+#endif
}
MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 8141b76..964ee67 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -17,6 +17,7 @@
select MENELAUS if ARCH_OMAP2
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
+ select HIGHMEM
help
Compile a kernel suitable for booting most boards
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 130ab00..2e50664 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -384,6 +384,11 @@
.id = -1,
};
+static struct platform_device sdp4430_hdmi_audio_codec = {
+ .name = "hdmi-audio-codec",
+ .id = -1,
+};
+
static struct omap_abe_twl6040_data sdp4430_abe_audio_data = {
.card_name = "SDP4430",
.has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
@@ -418,6 +423,7 @@
&sdp4430_vbat,
&sdp4430_dmic_codec,
&sdp4430_abe_audio,
+ &sdp4430_hdmi_audio_codec,
};
static struct omap_musb_board_data musb_board_data = {
@@ -615,7 +621,9 @@
TWL_COMMON_REGULATOR_VANA |
TWL_COMMON_REGULATOR_VCXIO |
TWL_COMMON_REGULATOR_VUSB |
- TWL_COMMON_REGULATOR_CLK32KG);
+ TWL_COMMON_REGULATOR_CLK32KG |
+ TWL_COMMON_REGULATOR_V1V8 |
+ TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &sdp4430_twldata,
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
omap_register_i2c_bus(2, 400, NULL, 0);
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index c3851e8..3b8a53c 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -30,6 +30,7 @@
#include "common.h"
#include <plat/usb.h>
+#include "am35xx-emac.h"
#include "mux.h"
#include "control.h"
@@ -90,6 +91,7 @@
}
usbhs_init(&usbhs_bdata);
+ am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
}
MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 909a8b9..d8c35a3 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -498,6 +498,10 @@
.setup = cm_t35_twl_gpio_setup,
};
+static struct twl4030_power_data cm_t35_power_data = {
+ .use_poweroff = true,
+};
+
static struct twl4030_platform_data cm_t35_twldata = {
/* platform_data for children goes here */
.keypad = &cm_t35_kp_data,
@@ -505,6 +509,7 @@
.vmmc1 = &cm_t35_vmmc1,
.vsim = &cm_t35_vsim,
.vio = &cm_t35_vio,
+ .power = &cm_t35_power_data,
};
static void __init cm_t35_init_i2c(void)
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 0349fd2..70a81f9 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -87,7 +87,7 @@
.dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
};
-static void
+void
__init board_onenand_init(struct mtd_partition *onenand_parts,
u8 nr_parts, u8 cs)
{
@@ -98,7 +98,7 @@
gpmc_onenand_init(&board_onenand_data);
}
#else
-static void
+void
__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
{
}
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
index d25503a..c44b70d 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -47,3 +47,14 @@
{
}
#endif
+
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+extern void board_onenand_init(struct mtd_partition *nand_parts,
+ u8 nr_parts, u8 cs);
+#else
+static inline void board_onenand_init(struct mtd_partition *nand_parts,
+ u8 nr_parts, u8 cs)
+{
+}
+#endif
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 740cee9..55dfccc 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -24,6 +24,8 @@
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
+#include <linux/mtd/nand.h>
+
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -39,6 +41,8 @@
#include "hsmmc.h"
#include "sdram-numonyx-m65kxxxxam.h"
#include "common-board-devices.h"
+#include "board-flash.h"
+#include "control.h"
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
@@ -60,6 +64,10 @@
#define IGEP3_GPIO_LED1_RED 16
#define IGEP3_GPIO_USBH_NRESET 183
+#define IGEP_SYSBOOT_MASK 0x1f
+#define IGEP_SYSBOOT_NAND 0x0f
+#define IGEP_SYSBOOT_ONENAND 0x10
+
/*
* IGEP2 Hardware Revision Table
*
@@ -110,8 +118,10 @@
gpio_free(IGEP2_GPIO_LED1_RED);
}
-#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
- defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+ defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
+ defined(CONFIG_MTD_NAND_OMAP2) || \
+ defined(CONFIG_MTD_NAND_OMAP2_MODULE)
#define ONENAND_MAP 0x20000000
@@ -123,7 +133,7 @@
* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
*/
-static struct mtd_partition igep_onenand_partitions[] = {
+static struct mtd_partition igep_flash_partitions[] = {
{
.name = "X-Loader",
.offset = 0,
@@ -151,50 +161,28 @@
},
};
-static struct omap_onenand_platform_data igep_onenand_data = {
- .parts = igep_onenand_partitions,
- .nr_parts = ARRAY_SIZE(igep_onenand_partitions),
- .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
-};
-
-static struct platform_device igep_onenand_device = {
- .name = "omap2-onenand",
- .id = -1,
- .dev = {
- .platform_data = &igep_onenand_data,
- },
-};
+static inline u32 igep_get_sysboot_value(void)
+{
+ return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) & IGEP_SYSBOOT_MASK;
+}
static void __init igep_flash_init(void)
{
- u8 cs = 0;
- u8 onenandcs = GPMC_CS_NUM + 1;
+ u32 mux;
+ mux = igep_get_sysboot_value();
- for (cs = 0; cs < GPMC_CS_NUM; cs++) {
- u32 ret;
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
-
- /* Check if NAND/oneNAND is configured */
- if ((ret & 0xC00) == 0x800)
- /* NAND found */
- pr_err("IGEP: Unsupported NAND found\n");
- else {
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
- if ((ret & 0x3F) == (ONENAND_MAP >> 24))
- /* ONENAND found */
- onenandcs = cs;
- }
+ if (mux == IGEP_SYSBOOT_NAND) {
+ pr_info("IGEP: initializing NAND memory device\n");
+ board_nand_init(igep_flash_partitions,
+ ARRAY_SIZE(igep_flash_partitions),
+ 0, NAND_BUSWIDTH_16);
+ } else if (mux == IGEP_SYSBOOT_ONENAND) {
+ pr_info("IGEP: initializing OneNAND memory device\n");
+ board_onenand_init(igep_flash_partitions,
+ ARRAY_SIZE(igep_flash_partitions), 0);
+ } else {
+ pr_err("IGEP: Flash: unsupported sysboot sequence found\n");
}
-
- if (onenandcs > GPMC_CS_NUM) {
- pr_err("IGEP: Unable to find configuration in GPMC\n");
- return;
- }
-
- igep_onenand_data.cs = onenandcs;
-
- if (platform_device_register(&igep_onenand_device) < 0)
- pr_err("IGEP: Unable to register OneNAND device\n");
}
#else
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 7be8d65..ae7d3a7 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -83,11 +83,13 @@
int usb_pwr_level;
int reset_gpio;
int usr_button_gpio;
+ int mmc_caps;
} beagle_config = {
.mmc1_gpio_wp = -EINVAL,
.usb_pwr_level = GPIOF_OUT_INIT_LOW,
.reset_gpio = 129,
.usr_button_gpio = 4,
+ .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
};
static struct gpio omap3_beagle_rev_gpios[] __initdata = {
@@ -145,10 +147,12 @@
printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n");
omap3_beagle_version = OMAP3BEAGLE_BOARD_XM;
beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH;
+ beagle_config.mmc_caps &= ~MMC_CAP_8_BIT_DATA;
break;
case 2:
printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n");
omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC;
+ beagle_config.mmc_caps &= ~MMC_CAP_8_BIT_DATA;
break;
default:
printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev);
@@ -251,7 +255,7 @@
static struct omap2_hsmmc_info mmc[] = {
{
.mmc = 1,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
+ .caps = MMC_CAP_4_BIT_DATA,
.gpio_wp = -EINVAL,
.deferred = true,
},
@@ -523,6 +527,7 @@
if (beagle_config.mmc1_gpio_wp != -EINVAL)
omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
+ mmc[0].caps = beagle_config.mmc_caps;
omap_hsmmc_init(mmc);
omap3_beagle_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 9b3c141..c008bf8 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -4,8 +4,9 @@
* Copyright (C) 2010 Li-Pro.Net
* Stephan Linz <linz@li-pro.net>
*
- * Copyright (C) 2010 Logic Product Development, Inc.
+ * Copyright (C) 2010-2012 Logic Product Development, Inc.
* Peter Barada <peter.barada@logicpd.com>
+ * Ashwin BIhari <ashwin.bihari@logicpd.com>
*
* Modified from Beagle, EVM, and RX51
*
@@ -45,6 +46,7 @@
#include <plat/gpmc-smsc911x.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
+#include <plat/usb.h>
#define OMAP3LOGIC_SMSC911X_CS 1
@@ -85,6 +87,11 @@
| BIT(13) | BIT(15) | BIT(16) | BIT(17),
};
+static struct twl4030_usb_data omap3logic_usb_data = {
+ .usb_mode = T2_USB_MODE_ULPI,
+};
+
+
static struct twl4030_platform_data omap3logic_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
@@ -92,6 +99,7 @@
/* platform_data for children goes here */
.gpio = &omap3logic_gpio_data,
.vmmc1 = &omap3logic_vmmc1,
+ .usb = &omap3logic_usb_data,
};
static int __init omap3logic_i2c_init(void)
@@ -185,6 +193,20 @@
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+ /* mUSB */
+ OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+ OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+ OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#endif
@@ -205,6 +227,8 @@
board_mmc_init();
board_smsc911x_init();
+ usb_musb_init(NULL);
+
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 1b782ba..c1061d4 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -28,6 +28,7 @@
#include <linux/mfd/twl6040.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
+#include <linux/ti_wilink_st.h>
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
@@ -58,12 +59,21 @@
#define HDMI_GPIO_HPD 63 /* Hotplug detect */
/* wl127x BT, FM, GPS connectivity chip */
-static int wl1271_gpios[] = {46, -1, -1};
+static struct ti_st_plat_data wilink_platform_data = {
+ .nshutdown_gpio = 46,
+ .dev_name = "/dev/ttyO1",
+ .flow_cntrl = 1,
+ .baud_rate = 3000000,
+ .chip_enable = NULL,
+ .suspend = NULL,
+ .resume = NULL,
+};
+
static struct platform_device wl1271_device = {
.name = "kim",
.id = -1,
.dev = {
- .platform_data = &wl1271_gpios,
+ .platform_data = &wilink_platform_data,
},
};
@@ -117,6 +127,11 @@
},
};
+static struct platform_device panda_hdmi_audio_codec = {
+ .name = "hdmi-audio-codec",
+ .id = -1,
+};
+
static struct platform_device btwilink_device = {
.name = "btwilink",
.id = -1,
@@ -126,6 +141,7 @@
&leds_gpio,
&wl1271_device,
&panda_abe_audio,
+ &panda_hdmi_audio_codec,
&btwilink_device,
};
@@ -323,7 +339,9 @@
TWL_COMMON_REGULATOR_VANA |
TWL_COMMON_REGULATOR_VCXIO |
TWL_COMMON_REGULATOR_VUSB |
- TWL_COMMON_REGULATOR_CLK32KG);
+ TWL_COMMON_REGULATOR_CLK32KG |
+ TWL_COMMON_REGULATOR_V1V8 |
+ TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &omap4_panda_twldata,
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
omap_register_i2c_bus(2, 400, NULL, 0);
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index d87ee06..415a4b7 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -44,6 +44,7 @@
#include <linux/leds-lp5523.h>
#include <../drivers/staging/iio/light/tsl2563.h>
+#include <linux/lis3lv02d.h>
#include "mux.h"
#include "hsmmc.h"
@@ -63,6 +64,9 @@
#define RX51_TSC2005_RESET_GPIO 104
#define RX51_TSC2005_IRQ_GPIO 100
+#define LIS302_IRQ1_GPIO 181
+#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
+
/* list all spi devices here */
enum {
RX51_SPI_WL1251,
@@ -73,6 +77,77 @@
static struct wl12xx_platform_data wl1251_pdata;
static struct tsc2005_platform_data tsc2005_pdata;
+#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
+static int lis302_setup(void)
+{
+ int err;
+ int irq1 = LIS302_IRQ1_GPIO;
+ int irq2 = LIS302_IRQ2_GPIO;
+
+ /* gpio for interrupt pin 1 */
+ err = gpio_request(irq1, "lis3lv02dl_irq1");
+ if (err) {
+ printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
+ goto out;
+ }
+
+ /* gpio for interrupt pin 2 */
+ err = gpio_request(irq2, "lis3lv02dl_irq2");
+ if (err) {
+ gpio_free(irq1);
+ printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
+ goto out;
+ }
+
+ gpio_direction_input(irq1);
+ gpio_direction_input(irq2);
+
+out:
+ return err;
+}
+
+static int lis302_release(void)
+{
+ gpio_free(LIS302_IRQ1_GPIO);
+ gpio_free(LIS302_IRQ2_GPIO);
+
+ return 0;
+}
+
+static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
+ .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
+ LIS3_CLICK_SINGLE_Z,
+ /* Limits are 0.5g * value */
+ .click_thresh_x = 8,
+ .click_thresh_y = 8,
+ .click_thresh_z = 10,
+ /* Click must be longer than time limit */
+ .click_time_limit = 9,
+ /* Kind of debounce filter */
+ .click_latency = 50,
+
+ /* Limits for all axis. millig-value / 18 to get HW values */
+ .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
+ .wakeup_thresh = 800 / 18,
+ .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
+ .wakeup_thresh2 = 900 / 18,
+
+ .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
+
+ /* Interrupt line 2 for click detection, line 1 for thresholds */
+ .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
+
+ .axis_x = LIS3_DEV_X,
+ .axis_y = LIS3_INV_DEV_Y,
+ .axis_z = LIS3_INV_DEV_Z,
+ .setup_resources = lis302_setup,
+ .release_resources = lis302_release,
+ .st_min_limits = {-32, 3, 3},
+ .st_max_limits = {-3, 32, 32},
+ .irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO),
+};
+#endif
+
#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
.cover_comp_gain = 16,
@@ -950,6 +1025,16 @@
}
};
+static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
+#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
+ {
+ I2C_BOARD_INFO("lis3lv02d", 0x1d),
+ .platform_data = &rx51_lis3lv02d_data,
+ .irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO),
+ },
+#endif
+};
+
static int __init rx51_i2c_init(void)
{
if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
@@ -971,7 +1056,8 @@
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
- omap_register_i2c_bus(3, 400, NULL, 0);
+ omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
+ ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
return 0;
}
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index e433603..17dacef 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -355,6 +355,36 @@
static inline void omap_init_dmic(void) {}
#endif
+#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
+ defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
+
+static struct platform_device omap_hdmi_audio = {
+ .name = "omap-hdmi-audio",
+ .id = -1,
+};
+
+static void __init omap_init_hdmi_audio(void)
+{
+ struct omap_hwmod *oh;
+ struct platform_device *pdev;
+
+ oh = omap_hwmod_lookup("dss_hdmi");
+ if (!oh) {
+ printk(KERN_ERR "Could not look up dss_hdmi hw_mod\n");
+ return;
+ }
+
+ pdev = omap_device_build("omap-hdmi-audio-dai",
+ -1, oh, NULL, 0, NULL, 0, 0);
+ WARN(IS_ERR(pdev),
+ "Can't build omap_device for omap-hdmi-audio-dai.\n");
+
+ platform_device_register(&omap_hdmi_audio);
+}
+#else
+static inline void omap_init_hdmi_audio(void) {}
+#endif
+
#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
#include <plat/mcspi.h>
@@ -704,6 +734,7 @@
omap_init_mcpdm();
omap_init_dmic();
omap_init_camera();
+ omap_init_hdmi_audio();
omap_init_mbox();
omap_init_mcspi();
omap_init_pmu();
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 7a7b893..119d5a9 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -31,6 +31,7 @@
#include "twl-common.h"
#include "pm.h"
+#include "voltage.h"
static struct i2c_board_info __initdata pmic_i2c_board_info = {
.addr = 0x48,
@@ -47,6 +48,18 @@
},
};
+static int twl_set_voltage(void *data, int target_uV)
+{
+ struct voltagedomain *voltdm = (struct voltagedomain *)data;
+ return voltdm_scale(voltdm, target_uV);
+}
+
+static int twl_get_voltage(void *data)
+{
+ struct voltagedomain *voltdm = (struct voltagedomain *)data;
+ return voltdm_get_voltage(voltdm);
+}
+
void __init omap_pmic_init(int bus, u32 clkrate,
const char *pmic_type, int pmic_irq,
struct twl4030_platform_data *pmic_data)
@@ -153,6 +166,48 @@
.consumer_supplies = omap3_vpll2_supplies,
};
+static struct regulator_consumer_supply omap3_vdd1_supply[] = {
+ REGULATOR_SUPPLY("vcc", "mpu.0"),
+};
+
+static struct regulator_consumer_supply omap3_vdd2_supply[] = {
+ REGULATOR_SUPPLY("vcc", "l3_main.0"),
+};
+
+static struct regulator_init_data omap3_vdd1 = {
+ .constraints = {
+ .name = "vdd_mpu_iva",
+ .min_uV = 600000,
+ .max_uV = 1450000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
+ .consumer_supplies = omap3_vdd1_supply,
+};
+
+static struct regulator_init_data omap3_vdd2 = {
+ .constraints = {
+ .name = "vdd_core",
+ .min_uV = 600000,
+ .max_uV = 1450000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
+ .consumer_supplies = omap3_vdd2_supply,
+};
+
+static struct twl_regulator_driver_data omap3_vdd1_drvdata = {
+ .get_voltage = twl_get_voltage,
+ .set_voltage = twl_set_voltage,
+};
+
+static struct twl_regulator_driver_data omap3_vdd2_drvdata = {
+ .get_voltage = twl_get_voltage,
+ .set_voltage = twl_set_voltage,
+};
+
void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
u32 pdata_flags, u32 regulators_flags)
{
@@ -160,6 +215,16 @@
pmic_data->irq_base = TWL4030_IRQ_BASE;
if (!pmic_data->irq_end)
pmic_data->irq_end = TWL4030_IRQ_END;
+ if (!pmic_data->vdd1) {
+ omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
+ omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
+ pmic_data->vdd1 = &omap3_vdd1;
+ }
+ if (!pmic_data->vdd2) {
+ omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
+ omap3_vdd2_drvdata.data = voltdm_lookup("core");
+ pmic_data->vdd2 = &omap3_vdd2;
+ }
/* Common platform data configurations */
if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
@@ -201,6 +266,7 @@
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
+ .supply_regulator = "V2V1",
};
static struct regulator_init_data omap4_vaux2_idata = {
@@ -291,6 +357,7 @@
},
.num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
.consumer_supplies = omap4_vcxio_supply,
+ .supply_regulator = "V2V1",
};
static struct regulator_init_data omap4_vusb_idata = {
@@ -310,6 +377,105 @@
},
};
+static struct regulator_consumer_supply omap4_vdd1_supply[] = {
+ REGULATOR_SUPPLY("vcc", "mpu.0"),
+};
+
+static struct regulator_consumer_supply omap4_vdd2_supply[] = {
+ REGULATOR_SUPPLY("vcc", "iva.0"),
+};
+
+static struct regulator_consumer_supply omap4_vdd3_supply[] = {
+ REGULATOR_SUPPLY("vcc", "l3_main.0"),
+};
+
+static struct regulator_init_data omap4_vdd1 = {
+ .constraints = {
+ .name = "vdd_mpu",
+ .min_uV = 500000,
+ .max_uV = 1500000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply),
+ .consumer_supplies = omap4_vdd1_supply,
+};
+
+static struct regulator_init_data omap4_vdd2 = {
+ .constraints = {
+ .name = "vdd_iva",
+ .min_uV = 500000,
+ .max_uV = 1500000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply),
+ .consumer_supplies = omap4_vdd2_supply,
+};
+
+static struct regulator_init_data omap4_vdd3 = {
+ .constraints = {
+ .name = "vdd_core",
+ .min_uV = 500000,
+ .max_uV = 1500000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply),
+ .consumer_supplies = omap4_vdd3_supply,
+};
+
+
+static struct twl_regulator_driver_data omap4_vdd1_drvdata = {
+ .get_voltage = twl_get_voltage,
+ .set_voltage = twl_set_voltage,
+};
+
+static struct twl_regulator_driver_data omap4_vdd2_drvdata = {
+ .get_voltage = twl_get_voltage,
+ .set_voltage = twl_set_voltage,
+};
+
+static struct twl_regulator_driver_data omap4_vdd3_drvdata = {
+ .get_voltage = twl_get_voltage,
+ .set_voltage = twl_set_voltage,
+};
+
+static struct regulator_consumer_supply omap4_v1v8_supply[] = {
+ REGULATOR_SUPPLY("vio", "1-004b"),
+};
+
+static struct regulator_init_data omap4_v1v8_idata = {
+ .constraints = {
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply),
+ .consumer_supplies = omap4_v1v8_supply,
+};
+
+static struct regulator_consumer_supply omap4_v2v1_supply[] = {
+ REGULATOR_SUPPLY("v2v1", "1-004b"),
+};
+
+static struct regulator_init_data omap4_v2v1_idata = {
+ .constraints = {
+ .min_uV = 2100000,
+ .max_uV = 2100000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply),
+ .consumer_supplies = omap4_v2v1_supply,
+};
+
void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
u32 pdata_flags, u32 regulators_flags)
{
@@ -318,6 +484,24 @@
if (!pmic_data->irq_end)
pmic_data->irq_end = TWL6030_IRQ_END;
+ if (!pmic_data->vdd1) {
+ omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
+ omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
+ pmic_data->vdd1 = &omap4_vdd1;
+ }
+
+ if (!pmic_data->vdd2) {
+ omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
+ omap4_vdd2_drvdata.data = voltdm_lookup("iva");
+ pmic_data->vdd2 = &omap4_vdd2;
+ }
+
+ if (!pmic_data->vdd3) {
+ omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
+ omap4_vdd3_drvdata.data = voltdm_lookup("core");
+ pmic_data->vdd3 = &omap4_vdd3;
+ }
+
/* Common platform data configurations */
if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
pmic_data->usb = &omap4_usb_pdata;
@@ -350,5 +534,11 @@
if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
!pmic_data->clk32kg)
pmic_data->clk32kg = &omap4_clk32kg_idata;
+
+ if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8)
+ pmic_data->v1v8 = &omap4_v1v8_idata;
+
+ if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1)
+ pmic_data->v2v1 = &omap4_v2v1_idata;
}
#endif /* CONFIG_ARCH_OMAP4 */
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 0962748..8fe71cf 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -22,6 +22,8 @@
#define TWL_COMMON_REGULATOR_VCXIO (1 << 8)
#define TWL_COMMON_REGULATOR_VUSB (1 << 9)
#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10)
+#define TWL_COMMON_REGULATOR_V1V8 (1 << 11)
+#define TWL_COMMON_REGULATOR_V2V1 (1 << 12)
/* TWL4030 LDO regulators */
#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4)
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index a5ec7f8f..5d8eaf3 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -46,6 +46,7 @@
};
struct omap_vc_channel omap3_vc_mpu = {
+ .flags = OMAP_VC_CHANNEL_DEFAULT,
.common = &omap3_vc_common,
.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 8a36342..4dc60e8 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -73,7 +73,8 @@
int voltdm_scale(struct voltagedomain *voltdm,
unsigned long target_volt)
{
- int ret;
+ int ret, i;
+ unsigned long volt = 0;
if (!voltdm || IS_ERR(voltdm)) {
pr_warning("%s: VDD specified does not exist!\n", __func__);
@@ -86,9 +87,23 @@
return -ENODATA;
}
- ret = voltdm->scale(voltdm, target_volt);
+ /* Adjust voltage to the exact voltage from the OPP table */
+ for (i = 0; voltdm->volt_data[i].volt_nominal != 0; i++) {
+ if (voltdm->volt_data[i].volt_nominal >= target_volt) {
+ volt = voltdm->volt_data[i].volt_nominal;
+ break;
+ }
+ }
+
+ if (!volt) {
+ pr_warning("%s: not scaling. OPP voltage for %lu, not found.\n",
+ __func__, target_volt);
+ return -EINVAL;
+ }
+
+ ret = voltdm->scale(voltdm, volt);
if (!ret)
- voltdm->nominal_volt = target_volt;
+ voltdm->nominal_volt = volt;
return ret;
}
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index c3ed15b..13d2bec 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -253,27 +253,6 @@
* GPIO LEDs (simple - doesn't use hardware blinking support)
*/
-#define ORION_BLINK_HALF_PERIOD 100 /* ms */
-
-static int dns323_gpio_blink_set(unsigned gpio, int state,
- unsigned long *delay_on, unsigned long *delay_off)
-{
-
- if (delay_on && delay_off && !*delay_on && !*delay_off)
- *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;
-
- switch(state) {
- case GPIO_LED_NO_BLINK_LOW:
- case GPIO_LED_NO_BLINK_HIGH:
- orion_gpio_set_blink(gpio, 0);
- gpio_set_value(gpio, state);
- break;
- case GPIO_LED_BLINK:
- orion_gpio_set_blink(gpio, 1);
- }
- return 0;
-}
-
static struct gpio_led dns323ab_leds[] = {
{
.name = "power:blue",
@@ -312,13 +291,13 @@
static struct gpio_led_platform_data dns323ab_led_data = {
.num_leds = ARRAY_SIZE(dns323ab_leds),
.leds = dns323ab_leds,
- .gpio_blink_set = dns323_gpio_blink_set,
+ .gpio_blink_set = orion_gpio_led_blink_set,
};
static struct gpio_led_platform_data dns323c_led_data = {
.num_leds = ARRAY_SIZE(dns323c_leds),
.leds = dns323c_leds,
- .gpio_blink_set = dns323_gpio_blink_set,
+ .gpio_blink_set = orion_gpio_led_blink_set,
};
static struct platform_device dns323_gpio_leds = {
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 865f6d3..d09da6a 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -103,6 +103,10 @@
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS_LPM_LOW,
+ /* STUART (IRDA) */
+ GPIO46_STUART_RXD,
+ GPIO47_STUART_TXD,
+
/* PWM 1 (Backlight) */
GPIO17_PWM1_OUT,
@@ -126,7 +130,7 @@
GPIO88_GPIO,
/* HX4700 specific input GPIOs */
- GPIO12_GPIO, /* ASIC3_IRQ */
+ GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
GPIO13_GPIO, /* W3220_IRQ */
GPIO14_GPIO, /* nWLAN_IRQ */
@@ -248,7 +252,6 @@
ASIC3_GPIOC0_LED0, /* red */
ASIC3_GPIOC1_LED1, /* green */
ASIC3_GPIOC2_LED2, /* blue */
- ASIC3_GPIOC4_CF_nCD,
ASIC3_GPIOC5_nCIOW,
ASIC3_GPIOC6_nCIOR,
ASIC3_GPIOC7_nPCE_1,
@@ -262,6 +265,7 @@
ASIC3_GPIOC15_nPIOR,
/* GPIOD: input GPIOs, CF */
+ ASIC3_GPIOD4_CF_nCD,
ASIC3_GPIOD11_nCIOIS16,
ASIC3_GPIOD12_nCWAIT,
ASIC3_GPIOD15_nPIOW,
@@ -312,6 +316,7 @@
.gpio_config_num = ARRAY_SIZE(asic3_gpio_config),
.irq_base = IRQ_BOARD_START,
.gpio_base = HX4700_ASIC3_GPIO_BASE,
+ .clock_rate = 4000000,
.leds = asic3_leds,
};
@@ -876,6 +881,7 @@
int ret;
pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
+ gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
if (ret)
pr_err ("hx4700: Failed to request GPIOs.\n");
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
index 0286844..e57f5c7 100644
--- a/arch/arm/mach-pxa/include/mach/mioa701.h
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -61,6 +61,9 @@
#define GPIO93_KEY_VOLUME_UP 93
#define GPIO94_KEY_VOLUME_DOWN 94
+/* Camera */
+#define GPIO56_MT9M111_nOE 56
+
extern struct input_dev *mioa701_evdev;
extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index d727916..0260aaa 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -31,7 +31,6 @@
#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
-#define PCM990_CTRL_BASE 0xea000000
#define PCM990_CTRL_SIZE (1*1024*1024)
#define PCM990_CTRL_PWR_IRQ_GPIO 14
@@ -69,13 +68,13 @@
#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */
#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */
-#define PCM990_CTRL_REG6 0x000C /* Interrupt Clear REGISTER */
+#define PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */
#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */
#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */
#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */
#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */
-#define PCM990_CTRL_REG7 0x000E /* Interrupt Enable REGISTER */
+#define PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */
#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */
#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */
#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */
@@ -102,32 +101,6 @@
#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */
#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */
-#define PCM990_CTRL_P2V(x) ((x) - PCM990_CTRL_PHYS + PCM990_CTRL_BASE)
-#define PCM990_CTRL_V2P(x) ((x) - PCM990_CTRL_BASE + PCM990_CTRL_PHYS)
-
-#ifndef __ASSEMBLY__
-# define __PCM990_CTRL_REG(x) \
- (*((volatile unsigned char *)PCM990_CTRL_P2V(x)))
-#else
-# define __PCM990_CTRL_REG(x) PCM990_CTRL_P2V(x)
-#endif
-
-#define PCM990_INTMSKENA __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)
-#define PCM990_INTSETCLR __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)
-#define PCM990_CTRL0 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG0)
-#define PCM990_CTRL1 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG1)
-#define PCM990_CTRL2 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG2)
-#define PCM990_CTRL3 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3)
-#define PCM990_CTRL4 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG4)
-#define PCM990_CTRL5 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5)
-#define PCM990_CTRL6 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)
-#define PCM990_CTRL7 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)
-#define PCM990_CTRL8 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG8)
-#define PCM990_CTRL9 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG9)
-#define PCM990_CTRL10 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG10)
-#define PCM990_CTRL11 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG11)
-
-
/*
* IDE
*/
@@ -166,24 +139,6 @@
#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE)
#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS)
-#ifndef __ASSEMBLY__
-# define __PCM990_IDE_PLD_REG(x) \
- (*((volatile unsigned char *)PCM990_IDE_PLD_P2V(x)))
-#else
-# define __PCM990_IDE_PLD_REG(x) PCM990_IDE_PLD_P2V(x)
-#endif
-
-#define PCM990_IDE0 \
- __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG0)
-#define PCM990_IDE1 \
- __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG1)
-#define PCM990_IDE2 \
- __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG2)
-#define PCM990_IDE3 \
- __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG3)
-#define PCM990_IDE4 \
- __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG4)
-
/*
* Compact Flash
*/
@@ -196,10 +151,6 @@
#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
-#define PCM990_CF_PLD_BASE 0xef000000
-#define PCM990_CF_PLD_SIZE (1*1024*1024)
-#define PCM990_CF_PLD_P2V(x) ((x) - PCM990_CF_PLD_PHYS + PCM990_CF_PLD_BASE)
-#define PCM990_CF_PLD_V2P(x) ((x) - PCM990_CF_PLD_BASE + PCM990_CF_PLD_PHYS)
/* visible CPLD (U6) registers */
#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */
@@ -239,21 +190,6 @@
#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */
#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */
-#ifndef __ASSEMBLY__
-# define __PCM990_CF_PLD_REG(x) \
- (*((volatile unsigned char *)PCM990_CF_PLD_P2V(x)))
-#else
-# define __PCM990_CF_PLD_REG(x) PCM990_CF_PLD_P2V(x)
-#endif
-
-#define PCM990_CF0 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG0)
-#define PCM990_CF1 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG1)
-#define PCM990_CF2 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG2)
-#define PCM990_CF3 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG3)
-#define PCM990_CF4 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG4)
-#define PCM990_CF5 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG5)
-#define PCM990_CF6 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG6)
-
/*
* Wolfson AC97 Touch
*/
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 6745149..bf99022 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -103,6 +103,7 @@
GPIO82_CIF_DD_5,
GPIO84_CIF_FV,
GPIO85_CIF_LV,
+ MIO_CFG_OUT(GPIO56_MT9M111_nOE, AF0, DRIVE_LOW),
/* Bluetooth */
MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0),
@@ -703,6 +704,7 @@
{ GPIO9_CHARGE_EN, GPIOF_OUT_INIT_HIGH, "Charger enable" },
{ GPIO18_POWEROFF, GPIOF_OUT_INIT_LOW, "Power Off" },
{ GPIO87_LCD_POWER, GPIOF_OUT_INIT_LOW, "LCD Power" },
+ { GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" },
};
static void __init mioa701_machine_init(void)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index abab4e2..cb723e8 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -65,6 +65,18 @@
GPIO31_AC97_SYNC,
};
+static void __iomem *pcm990_cpld_base;
+
+static u8 pcm990_cpld_readb(unsigned int reg)
+{
+ return readb(pcm990_cpld_base + reg);
+}
+
+static void pcm990_cpld_writeb(u8 value, unsigned int reg)
+{
+ writeb(value, pcm990_cpld_base + reg);
+}
+
/*
* pcm990_lcd_power - control power supply to the LCD
* @on: 0 = switch off, 1 = switch on
@@ -78,13 +90,13 @@
/* enable LCD-Latches
* power on LCD
*/
- __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
- PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
+ pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,
+ PCM990_CTRL_REG3);
} else {
/* disable LCD-Latches
* power off LCD
*/
- __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
+ pcm990_cpld_writeb(0, PCM990_CTRL_REG3);
}
}
#endif
@@ -243,15 +255,26 @@
static void pcm990_mask_ack_irq(struct irq_data *d)
{
int pcm990_irq = (d->irq - PCM027_IRQ(0));
- PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
+
+ pcm990_irq_enabled &= ~(1 << pcm990_irq);
+
+ pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
}
static void pcm990_unmask_irq(struct irq_data *d)
{
int pcm990_irq = (d->irq - PCM027_IRQ(0));
+ u8 val;
+
/* the irq can be acknowledged only if deasserted, so it's done here */
- PCM990_INTSETCLR |= 1 << pcm990_irq;
- PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
+
+ pcm990_irq_enabled |= (1 << pcm990_irq);
+
+ val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
+ val |= 1 << pcm990_irq;
+ pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);
+
+ pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
}
static struct irq_chip pcm990_irq_chip = {
@@ -261,7 +284,10 @@
static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
{
- unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
+ unsigned long pending;
+
+ pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
+ pending &= pcm990_irq_enabled;
do {
/* clear our parent IRQ */
@@ -270,7 +296,8 @@
irq = PCM027_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
}
- pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
+ pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
+ pending &= pcm990_irq_enabled;
} while (pending);
}
@@ -285,8 +312,9 @@
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
- PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
- PCM990_INTSETCLR = 0xFF;
+ /* disable all Interrupts */
+ pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);
+ pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);
irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
@@ -309,13 +337,16 @@
static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
+ u8 val;
+
+ val = pcm990_cpld_readb(PCM990_CTRL_REG5);
if ((1 << vdd) & p_d->ocr_mask)
- __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
- PCM990_CTRL_MMC2PWR;
+ val |= PCM990_CTRL_MMC2PWR;
else
- __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
- ~PCM990_CTRL_MMC2PWR;
+ val &= ~PCM990_CTRL_MMC2PWR;
+
+ pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
}
static void pcm990_mci_exit(struct device *dev, void *data)
@@ -481,23 +512,6 @@
#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
/*
- * enable generic access to the base board control CPLDs U6 and U7
- */
-static struct map_desc pcm990_io_desc[] __initdata = {
- {
- .virtual = PCM990_CTRL_BASE,
- .pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
- .length = PCM990_CTRL_SIZE,
- .type = MT_DEVICE /* CPLD */
- }, {
- .virtual = PCM990_CF_PLD_BASE,
- .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
- .length = PCM990_CF_PLD_SIZE,
- .type = MT_DEVICE /* CPLD */
- }
-};
-
-/*
* system init for baseboard usage. Will be called by pcm027 init.
*
* Add platform devices present on this baseboard and init
@@ -507,8 +521,11 @@
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
- /* register CPLD access */
- iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
+ pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);
+ if (!pcm990_cpld_base) {
+ pr_err("pcm990: failed to ioremap cpld\n");
+ return;
+ }
/* register CPLD's IRQ controller */
pcm990_init_irq();
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index e20bf58..7dce84b 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -306,6 +306,24 @@
REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
+
+ REGULATOR_SUPPLY("DC1VDD", "0-0034"),
+ REGULATOR_SUPPLY("DC2VDD", "0-0034"),
+ REGULATOR_SUPPLY("DC3VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
+ REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
+
+ REGULATOR_SUPPLY("DC1VDD", "1-0034"),
+ REGULATOR_SUPPLY("DC2VDD", "1-0034"),
+ REGULATOR_SUPPLY("DC3VDD", "1-0034"),
};
static struct regulator_init_data wallvdd_data = {
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 34560ca..8e3602a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -93,11 +93,23 @@
select ARCH_REQUIRE_GPIOLIB
depends on ARCH_R8A7740
+config MACH_ARMADILLO800EVA
+ bool "Armadillo-800 EVA board"
+ depends on ARCH_R8A7740
+ select ARCH_REQUIRE_GPIOLIB
+ select USE_OF
+
config MACH_MARZEN
bool "MARZEN board"
depends on ARCH_R8A7779
select ARCH_REQUIRE_GPIOLIB
+config MACH_KZM9G
+ bool "KZM-A9-GT board"
+ depends on ARCH_SH73A0
+ select ARCH_REQUIRE_GPIOLIB
+ select USE_OF
+
comment "SH-Mobile System Configuration"
config CPU_HAS_INTEVT
@@ -110,7 +122,8 @@
hex "Physical memory start address"
default "0x50000000" if MACH_G3EVM
default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \
- MACH_MACKEREL || MACH_BONITO
+ MACH_MACKEREL || MACH_BONITO || \
+ MACH_ARMADILLO800EVA
default "0x41000000" if MACH_KOTA2
default "0x00000000"
---help---
@@ -122,7 +135,8 @@
hex "Physical memory size"
default "0x08000000" if MACH_G3EVM
default "0x08000000" if MACH_G4EVM
- default "0x20000000" if MACH_AG5EVM || MACH_BONITO
+ default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \
+ MACH_ARMADILLO800EVA
default "0x1e000000" if MACH_KOTA2
default "0x10000000" if MACH_AP4EVB || MACH_MACKEREL
default "0x04000000"
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index e7c2590..4ac8c12 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -49,6 +49,8 @@
obj-$(CONFIG_MACH_KOTA2) += board-kota2.o
obj-$(CONFIG_MACH_BONITO) += board-bonito.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
+obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
+obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
# Framework support
obj-$(CONFIG_SMP) += $(smp-y)
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index b56dde2..0c3caeb 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -997,6 +997,8 @@
static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
.flags = SH_CEU_FLAG_USE_8BIT_BUS,
+ .max_width = 8188,
+ .max_height = 8188,
.csi2 = &csi2,
};
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
new file mode 100644
index 0000000..9e37026
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -0,0 +1,784 @@
+/*
+ * armadillo 800 eva board support
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/input.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/sh_eth.h>
+#include <linux/videodev2.h>
+#include <linux/usb/renesas_usbhs.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
+#include <mach/common.h>
+#include <mach/irqs.h>
+#include <asm/page.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <mach/r8a7740.h>
+#include <video/sh_mobile_lcdc.h>
+
+/*
+ * CON1 Camera Module
+ * CON2 Extension Bus
+ * CON3 HDMI Output
+ * CON4 Composite Video Output
+ * CON5 H-UDI JTAG
+ * CON6 ARM JTAG
+ * CON7 SD1
+ * CON8 SD2
+ * CON9 RTC BackUp
+ * CON10 Monaural Mic Input
+ * CON11 Stereo Headphone Output
+ * CON12 Audio Line Output(L)
+ * CON13 Audio Line Output(R)
+ * CON14 AWL13 Module
+ * CON15 Extension
+ * CON16 LCD1
+ * CON17 LCD2
+ * CON19 Power Input
+ * CON20 USB1
+ * CON21 USB2
+ * CON22 Serial
+ * CON23 LAN
+ * CON24 USB3
+ * LED1 Camera LED(Yellow)
+ * LED2 Power LED (Green)
+ * ED3-LED6 User LED(Yellow)
+ * LED7 LAN link LED(Green)
+ * LED8 LAN activity LED(Yellow)
+ */
+
+/*
+ * DipSwitch
+ *
+ * SW1
+ *
+ * -12345678-+---------------+----------------------------
+ * 1 | boot | hermit
+ * 0 | boot | OS auto boot
+ * -12345678-+---------------+----------------------------
+ * 00 | boot device | eMMC
+ * 10 | boot device | SDHI0 (CON7)
+ * 01 | boot device | -
+ * 11 | boot device | Extension Buss (CS0)
+ * -12345678-+---------------+----------------------------
+ * 0 | Extension Bus | D8-D15 disable, eMMC enable
+ * 1 | Extension Bus | D8-D15 enable, eMMC disable
+ * -12345678-+---------------+----------------------------
+ * 0 | SDHI1 | COM8 disable, COM14 enable
+ * 1 | SDHI1 | COM8 enable, COM14 disable
+ * -12345678-+---------------+----------------------------
+ * 0 | USB0 | COM20 enable, COM24 disable
+ * 1 | USB0 | COM20 disable, COM24 enable
+ * -12345678-+---------------+----------------------------
+ * 00 | JTAG | SH-X2
+ * 10 | JTAG | ARM
+ * 01 | JTAG | -
+ * 11 | JTAG | Boundary Scan
+ *-----------+---------------+----------------------------
+ */
+
+/*
+ * USB function
+ *
+ * When you use USB Function,
+ * set SW1.6 ON, and connect cable to CN24.
+ *
+ * USBF needs workaround on R8A7740 chip.
+ * These are a little bit complex.
+ * see
+ * usbhsf_power_ctrl()
+ *
+ * CAUTION
+ *
+ * It uses autonomy mode for USB hotplug at this point
+ * (= usbhs_private.platform_callback.get_vbus is NULL),
+ * since we don't know what's happen on PM control
+ * on this workaround.
+ */
+#define USBCR1 0xe605810a
+#define USBH 0xC6700000
+#define USBH_USBCTR 0x10834
+
+struct usbhsf_private {
+ struct clk *phy;
+ struct clk *usb24;
+ struct clk *pci;
+ struct clk *func;
+ struct clk *host;
+ void __iomem *usbh_base;
+ struct renesas_usbhs_platform_info info;
+};
+
+#define usbhsf_get_priv(pdev) \
+ container_of(renesas_usbhs_get_info(pdev), \
+ struct usbhsf_private, info)
+
+static int usbhsf_get_id(struct platform_device *pdev)
+{
+ return USBHS_GADGET;
+}
+
+static void usbhsf_power_ctrl(struct platform_device *pdev,
+ void __iomem *base, int enable)
+{
+ struct usbhsf_private *priv = usbhsf_get_priv(pdev);
+
+ /*
+ * Work around for USB Function.
+ * It needs USB host clock, and settings
+ */
+ if (enable) {
+ /*
+ * enable all the related usb clocks
+ * for usb workaround
+ */
+ clk_enable(priv->usb24);
+ clk_enable(priv->pci);
+ clk_enable(priv->host);
+ clk_enable(priv->func);
+ clk_enable(priv->phy);
+
+ /*
+ * set USBCR1
+ *
+ * Port1 is driven by USB function,
+ * Port2 is driven by USB HOST
+ * One HOST (Port1 or Port2 is HOST)
+ * USB PLL input clock = 24MHz
+ */
+ __raw_writew(0xd750, USBCR1);
+ mdelay(1);
+
+ /*
+ * start USB Host
+ */
+ __raw_writel(0x0000000c, priv->usbh_base + USBH_USBCTR);
+ __raw_writel(0x00000008, priv->usbh_base + USBH_USBCTR);
+ mdelay(10);
+
+ /*
+ * USB PHY Power ON
+ */
+ __raw_writew(0xd770, USBCR1);
+ __raw_writew(0x4000, base + 0x102); /* USBF :: SUSPMODE */
+
+ } else {
+ __raw_writel(0x0000010f, priv->usbh_base + USBH_USBCTR);
+ __raw_writew(0xd7c0, USBCR1); /* GPIO */
+
+ clk_disable(priv->phy);
+ clk_disable(priv->func); /* usb work around */
+ clk_disable(priv->host); /* usb work around */
+ clk_disable(priv->pci); /* usb work around */
+ clk_disable(priv->usb24); /* usb work around */
+ }
+}
+
+static void usbhsf_hardware_exit(struct platform_device *pdev)
+{
+ struct usbhsf_private *priv = usbhsf_get_priv(pdev);
+
+ if (!IS_ERR(priv->phy))
+ clk_put(priv->phy);
+ if (!IS_ERR(priv->usb24))
+ clk_put(priv->usb24);
+ if (!IS_ERR(priv->pci))
+ clk_put(priv->pci);
+ if (!IS_ERR(priv->host))
+ clk_put(priv->host);
+ if (!IS_ERR(priv->func))
+ clk_put(priv->func);
+ if (priv->usbh_base)
+ iounmap(priv->usbh_base);
+
+ priv->phy = NULL;
+ priv->usb24 = NULL;
+ priv->pci = NULL;
+ priv->host = NULL;
+ priv->func = NULL;
+ priv->usbh_base = NULL;
+}
+
+static int usbhsf_hardware_init(struct platform_device *pdev)
+{
+ struct usbhsf_private *priv = usbhsf_get_priv(pdev);
+
+ priv->phy = clk_get(&pdev->dev, "phy");
+ priv->usb24 = clk_get(&pdev->dev, "usb24");
+ priv->pci = clk_get(&pdev->dev, "pci");
+ priv->func = clk_get(&pdev->dev, "func");
+ priv->host = clk_get(&pdev->dev, "host");
+ priv->usbh_base = ioremap_nocache(USBH, 0x20000);
+
+ if (IS_ERR(priv->phy) ||
+ IS_ERR(priv->usb24) ||
+ IS_ERR(priv->pci) ||
+ IS_ERR(priv->host) ||
+ IS_ERR(priv->func) ||
+ !priv->usbh_base) {
+ dev_err(&pdev->dev, "USB clock setting failed\n");
+ usbhsf_hardware_exit(pdev);
+ return -EIO;
+ }
+
+ /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */
+ clk_set_rate(priv->usb24,
+ clk_get_rate(clk_get_parent(priv->usb24)));
+
+ return 0;
+}
+
+static struct usbhsf_private usbhsf_private = {
+ .info = {
+ .platform_callback = {
+ .get_id = usbhsf_get_id,
+ .hardware_init = usbhsf_hardware_init,
+ .hardware_exit = usbhsf_hardware_exit,
+ .power_ctrl = usbhsf_power_ctrl,
+ },
+ .driver_param = {
+ .buswait_bwait = 5,
+ .detection_delay = 5,
+ },
+ }
+};
+
+static struct resource usbhsf_resources[] = {
+ {
+ .name = "USBHS",
+ .start = 0xe6890000,
+ .end = 0xe6890104 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = evt2irq(0x0A20),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device usbhsf_device = {
+ .name = "renesas_usbhs",
+ .dev = {
+ .platform_data = &usbhsf_private.info,
+ },
+ .id = -1,
+ .num_resources = ARRAY_SIZE(usbhsf_resources),
+ .resource = usbhsf_resources,
+};
+
+/* Ether */
+static struct sh_eth_plat_data sh_eth_platdata = {
+ .phy = 0x00, /* LAN8710A */
+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .register_type = SH_ETH_REG_GIGABIT,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct resource sh_eth_resources[] = {
+ {
+ .start = 0xe9a00000,
+ .end = 0xe9a00800 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = 0xe9a01800,
+ .end = 0xe9a02000 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = evt2irq(0x0500),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device sh_eth_device = {
+ .name = "sh-eth",
+ .id = -1,
+ .dev = {
+ .platform_data = &sh_eth_platdata,
+ },
+ .resource = sh_eth_resources,
+ .num_resources = ARRAY_SIZE(sh_eth_resources),
+};
+
+/* LCDC */
+static struct fb_videomode lcdc0_mode = {
+ .name = "AMPIER/AM-800480",
+ .xres = 800,
+ .yres = 480,
+ .left_margin = 88,
+ .right_margin = 40,
+ .hsync_len = 128,
+ .upper_margin = 20,
+ .lower_margin = 5,
+ .vsync_len = 5,
+ .sync = 0,
+};
+
+static struct sh_mobile_lcdc_info lcdc0_info = {
+ .clock_source = LCDC_CLK_BUS,
+ .ch[0] = {
+ .chan = LCDC_CHAN_MAINLCD,
+ .fourcc = V4L2_PIX_FMT_RGB565,
+ .interface_type = RGB24,
+ .clock_divider = 5,
+ .flags = 0,
+ .lcd_modes = &lcdc0_mode,
+ .num_modes = 1,
+ .panel_cfg = {
+ .width = 111,
+ .height = 68,
+ },
+ },
+};
+
+static struct resource lcdc0_resources[] = {
+ [0] = {
+ .name = "LCD0",
+ .start = 0xfe940000,
+ .end = 0xfe943fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = intcs_evt2irq(0x580),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device lcdc0_device = {
+ .name = "sh_mobile_lcdc_fb",
+ .num_resources = ARRAY_SIZE(lcdc0_resources),
+ .resource = lcdc0_resources,
+ .id = 0,
+ .dev = {
+ .platform_data = &lcdc0_info,
+ .coherent_dma_mask = ~0,
+ },
+};
+
+/* GPIO KEY */
+#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
+
+static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW1"),
+ GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW2"),
+ GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW3"),
+ GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW4"),
+};
+
+static struct gpio_keys_platform_data gpio_key_info = {
+ .buttons = gpio_buttons,
+ .nbuttons = ARRAY_SIZE(gpio_buttons),
+};
+
+static struct platform_device gpio_keys_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .dev = {
+ .platform_data = &gpio_key_info,
+ },
+};
+
+/* SDHI0 */
+/*
+ * FIXME
+ *
+ * It use polling mode here, since
+ * CD (= Card Detect) pin is not connected to SDHI0_CD.
+ * We can use IRQ31 as card detect irq,
+ * but it needs chattering removal operation
+ */
+#define IRQ31 evt2irq(0x33E0)
+static struct sh_mobile_sdhi_info sdhi0_info = {
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\
+ MMC_CAP_NEEDS_POLL,
+ .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
+};
+
+static struct resource sdhi0_resources[] = {
+ {
+ .name = "SDHI0",
+ .start = 0xe6850000,
+ .end = 0xe6850100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ * no SH_MOBILE_SDHI_IRQ_CARD_DETECT here
+ */
+ {
+ .name = SH_MOBILE_SDHI_IRQ_SDCARD,
+ .start = evt2irq(0x0E20),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = SH_MOBILE_SDHI_IRQ_SDIO,
+ .start = evt2irq(0x0E40),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device sdhi0_device = {
+ .name = "sh_mobile_sdhi",
+ .id = 0,
+ .dev = {
+ .platform_data = &sdhi0_info,
+ },
+ .num_resources = ARRAY_SIZE(sdhi0_resources),
+ .resource = sdhi0_resources,
+};
+
+/* SDHI1 */
+static struct sh_mobile_sdhi_info sdhi1_info = {
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+ .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
+};
+
+static struct resource sdhi1_resources[] = {
+ [0] = {
+ .name = "SDHI1",
+ .start = 0xe6860000,
+ .end = 0xe6860100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = evt2irq(0x0E80),
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = evt2irq(0x0EA0),
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = evt2irq(0x0EC0),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device sdhi1_device = {
+ .name = "sh_mobile_sdhi",
+ .id = 1,
+ .dev = {
+ .platform_data = &sdhi1_info,
+ },
+ .num_resources = ARRAY_SIZE(sdhi1_resources),
+ .resource = sdhi1_resources,
+};
+
+/* MMCIF */
+static struct sh_mmcif_plat_data sh_mmcif_plat = {
+ .sup_pclk = 0,
+ .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
+ .caps = MMC_CAP_4_BIT_DATA |
+ MMC_CAP_8_BIT_DATA |
+ MMC_CAP_NONREMOVABLE,
+};
+
+static struct resource sh_mmcif_resources[] = {
+ [0] = {
+ .name = "MMCIF",
+ .start = 0xe6bd0000,
+ .end = 0xe6bd0100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* MMC ERR */
+ .start = evt2irq(0x1AC0),
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ /* MMC NOR */
+ .start = evt2irq(0x1AE0),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device sh_mmcif_device = {
+ .name = "sh_mmcif",
+ .id = -1,
+ .dev = {
+ .platform_data = &sh_mmcif_plat,
+ },
+ .num_resources = ARRAY_SIZE(sh_mmcif_resources),
+ .resource = sh_mmcif_resources,
+};
+
+/* I2C */
+static struct i2c_board_info i2c0_devices[] = {
+ {
+ I2C_BOARD_INFO("st1232-ts", 0x55),
+ .irq = evt2irq(0x0340),
+ },
+};
+
+/*
+ * board devices
+ */
+static struct platform_device *eva_devices[] __initdata = {
+ &lcdc0_device,
+ &gpio_keys_device,
+ &sh_eth_device,
+ &sdhi0_device,
+ &sh_mmcif_device,
+};
+
+static void __init eva_clock_init(void)
+{
+ struct clk *system = clk_get(NULL, "system_clk");
+ struct clk *xtal1 = clk_get(NULL, "extal1");
+ struct clk *usb24s = clk_get(NULL, "usb24s");
+
+ if (IS_ERR(system) ||
+ IS_ERR(xtal1) ||
+ IS_ERR(usb24s)) {
+ pr_err("armadillo800eva board clock init failed\n");
+ goto clock_error;
+ }
+
+ /* armadillo 800 eva extal1 is 24MHz */
+ clk_set_rate(xtal1, 24000000);
+
+ /* usb24s use extal1 (= system) clock (= 24MHz) */
+ clk_set_parent(usb24s, system);
+
+clock_error:
+ if (!IS_ERR(system))
+ clk_put(system);
+ if (!IS_ERR(xtal1))
+ clk_put(xtal1);
+ if (!IS_ERR(usb24s))
+ clk_put(usb24s);
+}
+
+/*
+ * board init
+ */
+static void __init eva_init(void)
+{
+ eva_clock_init();
+
+ r8a7740_pinmux_init();
+
+ /* SCIFA1 */
+ gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
+ gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
+
+ /* LCDC0 */
+ gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
+ gpio_request(GPIO_FN_LCD0_D0, NULL);
+ gpio_request(GPIO_FN_LCD0_D1, NULL);
+ gpio_request(GPIO_FN_LCD0_D2, NULL);
+ gpio_request(GPIO_FN_LCD0_D3, NULL);
+ gpio_request(GPIO_FN_LCD0_D4, NULL);
+ gpio_request(GPIO_FN_LCD0_D5, NULL);
+ gpio_request(GPIO_FN_LCD0_D6, NULL);
+ gpio_request(GPIO_FN_LCD0_D7, NULL);
+ gpio_request(GPIO_FN_LCD0_D8, NULL);
+ gpio_request(GPIO_FN_LCD0_D9, NULL);
+ gpio_request(GPIO_FN_LCD0_D10, NULL);
+ gpio_request(GPIO_FN_LCD0_D11, NULL);
+ gpio_request(GPIO_FN_LCD0_D12, NULL);
+ gpio_request(GPIO_FN_LCD0_D13, NULL);
+ gpio_request(GPIO_FN_LCD0_D14, NULL);
+ gpio_request(GPIO_FN_LCD0_D15, NULL);
+ gpio_request(GPIO_FN_LCD0_D16, NULL);
+ gpio_request(GPIO_FN_LCD0_D17, NULL);
+ gpio_request(GPIO_FN_LCD0_D18_PORT40, NULL);
+ gpio_request(GPIO_FN_LCD0_D19_PORT4, NULL);
+ gpio_request(GPIO_FN_LCD0_D20_PORT3, NULL);
+ gpio_request(GPIO_FN_LCD0_D21_PORT2, NULL);
+ gpio_request(GPIO_FN_LCD0_D22_PORT0, NULL);
+ gpio_request(GPIO_FN_LCD0_D23_PORT1, NULL);
+ gpio_request(GPIO_FN_LCD0_DCK, NULL);
+ gpio_request(GPIO_FN_LCD0_VSYN, NULL);
+ gpio_request(GPIO_FN_LCD0_HSYN, NULL);
+ gpio_request(GPIO_FN_LCD0_DISP, NULL);
+ gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
+
+ gpio_request(GPIO_PORT61, NULL); /* LCDDON */
+ gpio_direction_output(GPIO_PORT61, 1);
+
+ gpio_request(GPIO_PORT202, NULL); /* LCD0_LED_CONT */
+ gpio_direction_output(GPIO_PORT202, 0);
+
+ /* Touchscreen */
+ gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */
+ gpio_request(GPIO_PORT166, NULL); /* TP_RST_B */
+ gpio_direction_output(GPIO_PORT166, 1);
+
+ /* GETHER */
+ gpio_request(GPIO_FN_ET_CRS, NULL);
+ gpio_request(GPIO_FN_ET_MDC, NULL);
+ gpio_request(GPIO_FN_ET_MDIO, NULL);
+ gpio_request(GPIO_FN_ET_TX_ER, NULL);
+ gpio_request(GPIO_FN_ET_RX_ER, NULL);
+ gpio_request(GPIO_FN_ET_ERXD0, NULL);
+ gpio_request(GPIO_FN_ET_ERXD1, NULL);
+ gpio_request(GPIO_FN_ET_ERXD2, NULL);
+ gpio_request(GPIO_FN_ET_ERXD3, NULL);
+ gpio_request(GPIO_FN_ET_TX_CLK, NULL);
+ gpio_request(GPIO_FN_ET_TX_EN, NULL);
+ gpio_request(GPIO_FN_ET_ETXD0, NULL);
+ gpio_request(GPIO_FN_ET_ETXD1, NULL);
+ gpio_request(GPIO_FN_ET_ETXD2, NULL);
+ gpio_request(GPIO_FN_ET_ETXD3, NULL);
+ gpio_request(GPIO_FN_ET_PHY_INT, NULL);
+ gpio_request(GPIO_FN_ET_COL, NULL);
+ gpio_request(GPIO_FN_ET_RX_DV, NULL);
+ gpio_request(GPIO_FN_ET_RX_CLK, NULL);
+
+ gpio_request(GPIO_PORT18, NULL); /* PHY_RST */
+ gpio_direction_output(GPIO_PORT18, 1);
+
+ /* USB */
+ gpio_request(GPIO_PORT159, NULL); /* USB_DEVICE_MODE */
+ gpio_direction_input(GPIO_PORT159);
+
+ if (gpio_get_value(GPIO_PORT159)) {
+ /* USB Host */
+ } else {
+ /* USB Func */
+ gpio_request(GPIO_FN_VBUS, NULL);
+ platform_device_register(&usbhsf_device);
+ }
+
+ /* SDHI0 */
+ gpio_request(GPIO_FN_SDHI0_CMD, NULL);
+ gpio_request(GPIO_FN_SDHI0_CLK, NULL);
+ gpio_request(GPIO_FN_SDHI0_D0, NULL);
+ gpio_request(GPIO_FN_SDHI0_D1, NULL);
+ gpio_request(GPIO_FN_SDHI0_D2, NULL);
+ gpio_request(GPIO_FN_SDHI0_D3, NULL);
+ gpio_request(GPIO_FN_SDHI0_WP, NULL);
+
+ gpio_request(GPIO_PORT17, NULL); /* SDHI0_18/33_B */
+ gpio_request(GPIO_PORT74, NULL); /* SDHI0_PON */
+ gpio_request(GPIO_PORT75, NULL); /* SDSLOT1_PON */
+ gpio_direction_output(GPIO_PORT17, 0);
+ gpio_direction_output(GPIO_PORT74, 1);
+ gpio_direction_output(GPIO_PORT75, 1);
+
+ /* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */
+
+ /*
+ * MMCIF
+ *
+ * Here doesn't care SW1.4 status,
+ * since CON2 is not mounted.
+ */
+ gpio_request(GPIO_FN_MMC1_CLK_PORT103, NULL);
+ gpio_request(GPIO_FN_MMC1_CMD_PORT104, NULL);
+ gpio_request(GPIO_FN_MMC1_D0_PORT149, NULL);
+ gpio_request(GPIO_FN_MMC1_D1_PORT148, NULL);
+ gpio_request(GPIO_FN_MMC1_D2_PORT147, NULL);
+ gpio_request(GPIO_FN_MMC1_D3_PORT146, NULL);
+ gpio_request(GPIO_FN_MMC1_D4_PORT145, NULL);
+ gpio_request(GPIO_FN_MMC1_D5_PORT144, NULL);
+ gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL);
+ gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL);
+
+ /*
+ * CAUTION
+ *
+ * DBGMD/LCDC0/FSIA MUX
+ * DBGMD_SELECT_B should be set after setting PFC Function.
+ */
+ gpio_request(GPIO_PORT176, NULL);
+ gpio_direction_output(GPIO_PORT176, 1);
+
+ /*
+ * We can switch CON8/CON14 by SW1.5,
+ * but it needs after DBGMD_SELECT_B
+ */
+ gpio_request(GPIO_PORT6, NULL);
+ gpio_direction_input(GPIO_PORT6);
+ if (gpio_get_value(GPIO_PORT6)) {
+ /* CON14 enable */
+ } else {
+ /* CON8 (SDHI1) enable */
+ gpio_request(GPIO_FN_SDHI1_CLK, NULL);
+ gpio_request(GPIO_FN_SDHI1_CMD, NULL);
+ gpio_request(GPIO_FN_SDHI1_D0, NULL);
+ gpio_request(GPIO_FN_SDHI1_D1, NULL);
+ gpio_request(GPIO_FN_SDHI1_D2, NULL);
+ gpio_request(GPIO_FN_SDHI1_D3, NULL);
+ gpio_request(GPIO_FN_SDHI1_CD, NULL);
+ gpio_request(GPIO_FN_SDHI1_WP, NULL);
+
+ gpio_request(GPIO_PORT16, NULL); /* SDSLOT2_PON */
+ gpio_direction_output(GPIO_PORT16, 1);
+
+ platform_device_register(&sdhi1_device);
+ }
+
+
+#ifdef CONFIG_CACHE_L2X0
+ /* Early BRESP enable, Shared attribute override enable, 32K*8way */
+ l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
+#endif
+
+ i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
+
+ r8a7740_add_standard_devices();
+
+ platform_add_devices(eva_devices,
+ ARRAY_SIZE(eva_devices));
+}
+
+static void __init eva_earlytimer_init(void)
+{
+ r8a7740_clock_init(MD_CK0 | MD_CK2);
+ shmobile_earlytimer_init();
+}
+
+static void __init eva_add_early_devices(void)
+{
+ r8a7740_add_early_devices();
+
+ /* override timer setup with board-specific code */
+ shmobile_timer.init = eva_earlytimer_init;
+}
+
+static const char *eva_boards_compat_dt[] __initdata = {
+ "renesas,armadillo800eva",
+ NULL,
+};
+
+DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
+ .map_io = r8a7740_map_io,
+ .init_early = eva_add_early_devices,
+ .init_irq = r8a7740_init_irq,
+ .handle_irq = shmobile_handle_irq_intc,
+ .init_machine = eva_init,
+ .timer = &shmobile_timer,
+ .dt_compat = eva_boards_compat_dt,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 81fd95f..63ab706 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -486,7 +486,7 @@
shmobile_earlytimer_init();
}
-void __init bonito_add_early_devices(void)
+static void __init bonito_add_early_devices(void)
{
r8a7740_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
new file mode 100644
index 0000000..d8e33b6
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -0,0 +1,460 @@
+/*
+ * KZM-A9-GT board support
+ *
+ * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pcf857x.h>
+#include <linux/input.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
+#include <linux/mfd/tmio.h>
+#include <linux/platform_device.h>
+#include <linux/smsc911x.h>
+#include <linux/usb/r8a66597.h>
+#include <linux/videodev2.h>
+#include <mach/irqs.h>
+#include <mach/sh73a0.h>
+#include <mach/common.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <video/sh_mobile_lcdc.h>
+
+/*
+ * external GPIO
+ */
+#define GPIO_PCF8575_BASE (GPIO_NR)
+#define GPIO_PCF8575_PORT10 (GPIO_NR + 8)
+#define GPIO_PCF8575_PORT11 (GPIO_NR + 9)
+#define GPIO_PCF8575_PORT12 (GPIO_NR + 10)
+#define GPIO_PCF8575_PORT13 (GPIO_NR + 11)
+#define GPIO_PCF8575_PORT14 (GPIO_NR + 12)
+#define GPIO_PCF8575_PORT15 (GPIO_NR + 13)
+#define GPIO_PCF8575_PORT16 (GPIO_NR + 14)
+
+/* SMSC 9221 */
+static struct resource smsc9221_resources[] = {
+ [0] = {
+ .start = 0x10000000, /* CS4 */
+ .end = 0x100000ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = intcs_evt2irq(0x260), /* IRQ3 */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct smsc911x_platform_config smsc9221_platdata = {
+ .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+};
+
+static struct platform_device smsc_device = {
+ .name = "smsc911x",
+ .dev = {
+ .platform_data = &smsc9221_platdata,
+ },
+ .resource = smsc9221_resources,
+ .num_resources = ARRAY_SIZE(smsc9221_resources),
+};
+
+/* USB external chip */
+static struct r8a66597_platdata usb_host_data = {
+ .on_chip = 0,
+ .xtal = R8A66597_PLATDATA_XTAL_48MHZ,
+};
+
+static struct resource usb_resources[] = {
+ [0] = {
+ .start = 0x10010000,
+ .end = 0x1001ffff - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = intcs_evt2irq(0x220), /* IRQ1 */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device usb_host_device = {
+ .name = "r8a66597_hcd",
+ .dev = {
+ .platform_data = &usb_host_data,
+ .dma_mask = NULL,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(usb_resources),
+ .resource = usb_resources,
+};
+
+/* LCDC */
+static struct fb_videomode kzm_lcdc_mode = {
+ .name = "WVGA Panel",
+ .xres = 800,
+ .yres = 480,
+ .left_margin = 220,
+ .right_margin = 110,
+ .hsync_len = 70,
+ .upper_margin = 20,
+ .lower_margin = 5,
+ .vsync_len = 5,
+ .sync = 0,
+};
+
+static struct sh_mobile_lcdc_info lcdc_info = {
+ .clock_source = LCDC_CLK_BUS,
+ .ch[0] = {
+ .chan = LCDC_CHAN_MAINLCD,
+ .fourcc = V4L2_PIX_FMT_RGB565,
+ .interface_type = RGB24,
+ .lcd_modes = &kzm_lcdc_mode,
+ .num_modes = 1,
+ .clock_divider = 5,
+ .flags = 0,
+ .panel_cfg = {
+ .width = 152,
+ .height = 91,
+ },
+ }
+};
+
+static struct resource lcdc_resources[] = {
+ [0] = {
+ .name = "LCDC",
+ .start = 0xfe940000,
+ .end = 0xfe943fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = intcs_evt2irq(0x580),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device lcdc_device = {
+ .name = "sh_mobile_lcdc_fb",
+ .num_resources = ARRAY_SIZE(lcdc_resources),
+ .resource = lcdc_resources,
+ .dev = {
+ .platform_data = &lcdc_info,
+ .coherent_dma_mask = ~0,
+ },
+};
+
+/* MMCIF */
+static struct resource sh_mmcif_resources[] = {
+ [0] = {
+ .name = "MMCIF",
+ .start = 0xe6bd0000,
+ .end = 0xe6bd00ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = gic_spi(141),
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = gic_spi(140),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct sh_mmcif_plat_data sh_mmcif_platdata = {
+ .ocr = MMC_VDD_165_195,
+ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
+};
+
+static struct platform_device mmc_device = {
+ .name = "sh_mmcif",
+ .dev = {
+ .dma_mask = NULL,
+ .coherent_dma_mask = 0xffffffff,
+ .platform_data = &sh_mmcif_platdata,
+ },
+ .num_resources = ARRAY_SIZE(sh_mmcif_resources),
+ .resource = sh_mmcif_resources,
+};
+
+/* SDHI */
+static struct sh_mobile_sdhi_info sdhi0_info = {
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED,
+ .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
+};
+
+static struct resource sdhi0_resources[] = {
+ [0] = {
+ .name = "SDHI0",
+ .start = 0xee100000,
+ .end = 0xee1000ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
+ .start = gic_spi(83),
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .name = SH_MOBILE_SDHI_IRQ_SDCARD,
+ .start = gic_spi(84),
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .name = SH_MOBILE_SDHI_IRQ_SDIO,
+ .start = gic_spi(85),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device sdhi0_device = {
+ .name = "sh_mobile_sdhi",
+ .num_resources = ARRAY_SIZE(sdhi0_resources),
+ .resource = sdhi0_resources,
+ .dev = {
+ .platform_data = &sdhi0_info,
+ },
+};
+
+/* KEY */
+#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
+
+static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_BACK, GPIO_PCF8575_PORT10, "SW3"),
+ GPIO_KEY(KEY_RIGHT, GPIO_PCF8575_PORT11, "SW2-R"),
+ GPIO_KEY(KEY_LEFT, GPIO_PCF8575_PORT12, "SW2-L"),
+ GPIO_KEY(KEY_ENTER, GPIO_PCF8575_PORT13, "SW2-P"),
+ GPIO_KEY(KEY_UP, GPIO_PCF8575_PORT14, "SW2-U"),
+ GPIO_KEY(KEY_DOWN, GPIO_PCF8575_PORT15, "SW2-D"),
+ GPIO_KEY(KEY_HOME, GPIO_PCF8575_PORT16, "SW1"),
+};
+
+static struct gpio_keys_platform_data gpio_key_info = {
+ .buttons = gpio_buttons,
+ .nbuttons = ARRAY_SIZE(gpio_buttons),
+ .poll_interval = 250, /* poling at this point */
+};
+
+static struct platform_device gpio_keys_device = {
+ /* gpio-pcf857x.c driver doesn't support gpio_to_irq() */
+ .name = "gpio-keys-polled",
+ .dev = {
+ .platform_data = &gpio_key_info,
+ },
+};
+
+/* I2C */
+static struct pcf857x_platform_data pcf8575_pdata = {
+ .gpio_base = GPIO_PCF8575_BASE,
+};
+
+static struct i2c_board_info i2c1_devices[] = {
+ {
+ I2C_BOARD_INFO("st1232-ts", 0x55),
+ .irq = intcs_evt2irq(0x300), /* IRQ8 */
+ },
+};
+
+static struct i2c_board_info i2c3_devices[] = {
+ {
+ I2C_BOARD_INFO("pcf8575", 0x20),
+ .platform_data = &pcf8575_pdata,
+ },
+};
+
+static struct platform_device *kzm_devices[] __initdata = {
+ &smsc_device,
+ &usb_host_device,
+ &lcdc_device,
+ &mmc_device,
+ &sdhi0_device,
+ &gpio_keys_device,
+};
+
+/*
+ * FIXME
+ *
+ * This is quick hack for enabling LCDC backlight
+ */
+static int __init as3711_enable_lcdc_backlight(void)
+{
+ struct i2c_adapter *a = i2c_get_adapter(0);
+ struct i2c_msg msg;
+ int i, ret;
+ __u8 magic[] = {
+ 0x40, 0x2a,
+ 0x43, 0x3c,
+ 0x44, 0x3c,
+ 0x45, 0x3c,
+ 0x54, 0x03,
+ 0x51, 0x00,
+ 0x51, 0x01,
+ 0xff, 0x00, /* wait */
+ 0x43, 0xf0,
+ 0x44, 0xf0,
+ 0x45, 0xf0,
+ };
+
+ if (!machine_is_kzm9g())
+ return 0;
+
+ if (!a)
+ return 0;
+
+ msg.addr = 0x40;
+ msg.len = 2;
+ msg.flags = 0;
+
+ for (i = 0; i < ARRAY_SIZE(magic); i += 2) {
+ msg.buf = magic + i;
+
+ if (0xff == msg.buf[0]) {
+ udelay(500);
+ continue;
+ }
+
+ ret = i2c_transfer(a, &msg, 1);
+ if (ret < 0) {
+ pr_err("i2c transfer fail\n");
+ break;
+ }
+ }
+
+ return 0;
+}
+device_initcall(as3711_enable_lcdc_backlight);
+
+static void __init kzm_init(void)
+{
+ sh73a0_pinmux_init();
+
+ /* enable SCIFA4 */
+ gpio_request(GPIO_FN_SCIFA4_TXD, NULL);
+ gpio_request(GPIO_FN_SCIFA4_RXD, NULL);
+ gpio_request(GPIO_FN_SCIFA4_RTS_, NULL);
+ gpio_request(GPIO_FN_SCIFA4_CTS_, NULL);
+
+ /* CS4 for SMSC/USB */
+ gpio_request(GPIO_FN_CS4_, NULL); /* CS4 */
+
+ /* SMSC */
+ gpio_request(GPIO_PORT224, NULL); /* IRQ3 */
+ gpio_direction_input(GPIO_PORT224);
+
+ /* LCDC */
+ gpio_request(GPIO_FN_LCDD23, NULL);
+ gpio_request(GPIO_FN_LCDD22, NULL);
+ gpio_request(GPIO_FN_LCDD21, NULL);
+ gpio_request(GPIO_FN_LCDD20, NULL);
+ gpio_request(GPIO_FN_LCDD19, NULL);
+ gpio_request(GPIO_FN_LCDD18, NULL);
+ gpio_request(GPIO_FN_LCDD17, NULL);
+ gpio_request(GPIO_FN_LCDD16, NULL);
+ gpio_request(GPIO_FN_LCDD15, NULL);
+ gpio_request(GPIO_FN_LCDD14, NULL);
+ gpio_request(GPIO_FN_LCDD13, NULL);
+ gpio_request(GPIO_FN_LCDD12, NULL);
+ gpio_request(GPIO_FN_LCDD11, NULL);
+ gpio_request(GPIO_FN_LCDD10, NULL);
+ gpio_request(GPIO_FN_LCDD9, NULL);
+ gpio_request(GPIO_FN_LCDD8, NULL);
+ gpio_request(GPIO_FN_LCDD7, NULL);
+ gpio_request(GPIO_FN_LCDD6, NULL);
+ gpio_request(GPIO_FN_LCDD5, NULL);
+ gpio_request(GPIO_FN_LCDD4, NULL);
+ gpio_request(GPIO_FN_LCDD3, NULL);
+ gpio_request(GPIO_FN_LCDD2, NULL);
+ gpio_request(GPIO_FN_LCDD1, NULL);
+ gpio_request(GPIO_FN_LCDD0, NULL);
+ gpio_request(GPIO_FN_LCDDISP, NULL);
+ gpio_request(GPIO_FN_LCDDCK, NULL);
+
+ gpio_request(GPIO_PORT222, NULL); /* LCDCDON */
+ gpio_request(GPIO_PORT226, NULL); /* SC */
+ gpio_direction_output(GPIO_PORT222, 1);
+ gpio_direction_output(GPIO_PORT226, 1);
+
+ /* Touchscreen */
+ gpio_request(GPIO_PORT223, NULL); /* IRQ8 */
+ gpio_direction_input(GPIO_PORT223);
+
+ /* enable MMCIF */
+ gpio_request(GPIO_FN_MMCCLK0, NULL);
+ gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
+ gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
+
+ /* enable SD */
+ gpio_request(GPIO_FN_SDHIWP0, NULL);
+ gpio_request(GPIO_FN_SDHICD0, NULL);
+ gpio_request(GPIO_FN_SDHICMD0, NULL);
+ gpio_request(GPIO_FN_SDHICLK0, NULL);
+ gpio_request(GPIO_FN_SDHID0_3, NULL);
+ gpio_request(GPIO_FN_SDHID0_2, NULL);
+ gpio_request(GPIO_FN_SDHID0_1, NULL);
+ gpio_request(GPIO_FN_SDHID0_0, NULL);
+ gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL);
+ gpio_request(GPIO_PORT15, NULL);
+ gpio_direction_output(GPIO_PORT15, 1); /* power */
+
+ /* I2C 3 */
+ gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
+ gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
+
+#ifdef CONFIG_CACHE_L2X0
+ /* Early BRESP enable, Shared attribute override enable, 64K*8way */
+ l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
+#endif
+
+ i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices));
+ i2c_register_board_info(3, i2c3_devices, ARRAY_SIZE(i2c3_devices));
+
+ sh73a0_add_standard_devices();
+ platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices));
+}
+
+static const char *kzm9g_boards_compat_dt[] __initdata = {
+ "renesas,kzm9g",
+ NULL,
+};
+
+DT_MACHINE_START(KZM9G_DT, "kzm9g")
+ .map_io = sh73a0_map_io,
+ .init_early = sh73a0_add_early_devices,
+ .nr_irqs = NR_IRQS_LEGACY,
+ .init_irq = sh73a0_init_irq,
+ .handle_irq = gic_handle_irq,
+ .init_machine = kzm_init,
+ .timer = &shmobile_timer,
+ .dt_compat = kzm9g_boards_compat_dt,
+MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 8c6202b..aae2e24 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -908,6 +908,8 @@
static struct sh_fsi_platform_info fsi_info = {
.port_a = {
.flags = SH_FSI_BRS_INV,
+ .tx_id = SHDMA_SLAVE_FSIA_TX,
+ .rx_id = SHDMA_SLAVE_FSIA_RX,
},
.port_b = {
.flags = SH_FSI_BRS_INV |
@@ -920,9 +922,11 @@
static struct resource fsi_resources[] = {
[0] = {
+ /* we need 0xFE1F0000 to access DMA
+ * instead of 0xFE3C0000 */
.name = "FSI",
- .start = 0xFE3C0000,
- .end = 0xFE3C0400 - 1,
+ .start = 0xFE1F0000,
+ .end = 0xFE1F0400 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -1248,6 +1252,8 @@
static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
.flags = SH_CEU_FLAG_USE_8BIT_BUS,
+ .max_width = 8188,
+ .max_height = 8188,
};
static struct resource ceu_resources[] = {
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 99c4d74..26eea5f 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -47,6 +47,7 @@
#define PLLC01CR 0xe6150028
#define SUBCKCR 0xe6150080
+#define USBCKCR 0xe615008c
#define MSTPSR0 0xe6150030
#define MSTPSR1 0xe6150038
@@ -181,6 +182,95 @@
.parent = &pllc1_clk,
};
+/* USB clock */
+static struct clk *usb24s_parents[] = {
+ [0] = &system_clk,
+ [1] = &extal2_clk
+};
+
+static int usb24s_enable(struct clk *clk)
+{
+ __raw_writel(__raw_readl(USBCKCR) & ~(1 << 8), USBCKCR);
+
+ return 0;
+}
+
+static void usb24s_disable(struct clk *clk)
+{
+ __raw_writel(__raw_readl(USBCKCR) | (1 << 8), USBCKCR);
+}
+
+static int usb24s_set_parent(struct clk *clk, struct clk *parent)
+{
+ int i, ret;
+ u32 val;
+
+ if (!clk->parent_table || !clk->parent_num)
+ return -EINVAL;
+
+ /* Search the parent */
+ for (i = 0; i < clk->parent_num; i++)
+ if (clk->parent_table[i] == parent)
+ break;
+
+ if (i == clk->parent_num)
+ return -ENODEV;
+
+ ret = clk_reparent(clk, parent);
+ if (ret < 0)
+ return ret;
+
+ val = __raw_readl(USBCKCR);
+ val &= ~(1 << 7);
+ val |= i << 7;
+ __raw_writel(val, USBCKCR);
+
+ return 0;
+}
+
+static struct sh_clk_ops usb24s_clk_ops = {
+ .recalc = followparent_recalc,
+ .enable = usb24s_enable,
+ .disable = usb24s_disable,
+ .set_parent = usb24s_set_parent,
+};
+
+static struct clk usb24s_clk = {
+ .ops = &usb24s_clk_ops,
+ .parent_table = usb24s_parents,
+ .parent_num = ARRAY_SIZE(usb24s_parents),
+ .parent = &system_clk,
+};
+
+static unsigned long usb24_recalc(struct clk *clk)
+{
+ return clk->parent->rate /
+ ((__raw_readl(USBCKCR) & (1 << 6)) ? 1 : 2);
+};
+
+static int usb24_set_rate(struct clk *clk, unsigned long rate)
+{
+ u32 val;
+
+ /* closer to which ? parent->rate or parent->rate/2 */
+ val = __raw_readl(USBCKCR);
+ val &= ~(1 << 6);
+ val |= (rate > (clk->parent->rate / 4) * 3) << 6;
+ __raw_writel(val, USBCKCR);
+
+ return 0;
+}
+
+static struct sh_clk_ops usb24_clk_ops = {
+ .recalc = usb24_recalc,
+ .set_rate = usb24_set_rate,
+};
+
+static struct clk usb24_clk = {
+ .ops = &usb24_clk_ops,
+ .parent = &usb24s_clk,
+};
+
struct clk *main_clks[] = {
&extalr_clk,
&extal1_clk,
@@ -196,6 +286,8 @@
&pllc0_clk,
&pllc1_clk,
&pllc1_div2_clk,
+ &usb24s_clk,
+ &usb24_clk,
};
static void div4_kick(struct clk *clk)
@@ -223,7 +315,7 @@
enum {
DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,
- DIV4_HPP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,
+ DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,
DIV4_NR
};
@@ -234,6 +326,7 @@
[DIV4_M1] = SH_CLK_DIV4(&pllc1_clk, FRQCRA, 4, 0x6fff, CLK_ENABLE_ON_INIT),
[DIV4_HP] = SH_CLK_DIV4(&pllc1_clk, FRQCRB, 4, 0x6fff, 0),
[DIV4_HPP] = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 20, 0x6fff, 0),
+ [DIV4_USBP] = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 16, 0x6fff, 0),
[DIV4_S] = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 12, 0x6fff, 0),
[DIV4_ZB] = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 8, 0x6fff, 0),
[DIV4_M3] = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 4, 0x6fff, 0),
@@ -257,7 +350,11 @@
MSTP222,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- MSTP329, MSTP323,
+ MSTP329, MSTP328, MSTP323, MSTP320,
+ MSTP314, MSTP313, MSTP312,
+ MSTP309,
+
+ MSTP416, MSTP415, MSTP407, MSTP406,
MSTP_NR
};
@@ -280,7 +377,18 @@
[MSTP200] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
[MSTP329] = SH_CLK_MSTP32(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+ [MSTP328] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 28, 0), /* FSI */
[MSTP323] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
+ [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 20, 0), /* USBF */
+ [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
+ [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
+ [MSTP312] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
+ [MSTP309] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 9, 0), /* GEther */
+
+ [MSTP416] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 16, 0), /* USBHOST */
+ [MSTP415] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
+ [MSTP407] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 7, 0), /* USB-Func */
+ [MSTP406] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 6, 0), /* USB Phy */
};
static struct clk_lookup lookups[] = {
@@ -299,6 +407,7 @@
CLKDEV_CON_ID("pllc0_clk", &pllc0_clk),
CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
+ CLKDEV_CON_ID("usb24s", &usb24s_clk),
/* DIV4 clocks */
CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
@@ -334,7 +443,22 @@
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
+ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]),
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
+ CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP309]),
+
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]),
+
+ /* ICK */
+ CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]),
+ CLKDEV_ICK_ID("func", "renesas_usbhs", &mstp_clks[MSTP407]),
+ CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]),
+ CLKDEV_ICK_ID("pci", "renesas_usbhs", &div4_clks[DIV4_USBP]),
+ CLKDEV_ICK_ID("usb24", "renesas_usbhs", &usb24_clk),
};
void __init r8a7740_clock_init(u8 md_ck)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c85e6ec..ff5f12f 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -3,6 +3,8 @@
extern void shmobile_earlytimer_init(void);
extern struct sys_timer shmobile_timer;
+extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
+ unsigned int mult, unsigned int div);
struct twd_local_timer;
extern void shmobile_setup_console(void);
extern void shmobile_secondary_vector(void);
diff --git a/arch/arm/mach-shmobile/include/mach/intc.h b/arch/arm/mach-shmobile/include/mach/intc.h
index 8b22258..a5603c7 100644
--- a/arch/arm/mach-shmobile/include/mach/intc.h
+++ b/arch/arm/mach-shmobile/include/mach/intc.h
@@ -142,6 +142,50 @@
p ## _sense_registers, p ## _ack_registers) \
}
+#define INTC_IRQ_PINS_16H(p, base, vect, str) \
+ \
+static struct resource p ## _resources[] __initdata = { \
+ [0] = { \
+ .start = base, \
+ .end = base + 0x64, \
+ .flags = IORESOURCE_MEM, \
+ }, \
+}; \
+ \
+enum { \
+ p ## _UNUSED = 0, \
+ INTC_IRQ_PINS_ENUM_16H(p), \
+}; \
+ \
+static struct intc_vect p ## _vectors[] __initdata = { \
+ INTC_IRQ_PINS_VECT_16H(p, vect), \
+}; \
+ \
+static struct intc_mask_reg p ## _mask_registers[] __initdata = { \
+ INTC_IRQ_PINS_MASK_16H(p, base), \
+}; \
+ \
+static struct intc_prio_reg p ## _prio_registers[] __initdata = { \
+ INTC_IRQ_PINS_PRIO_16H(p, base), \
+}; \
+ \
+static struct intc_sense_reg p ## _sense_registers[] __initdata = { \
+ INTC_IRQ_PINS_SENSE_16H(p, base), \
+}; \
+ \
+static struct intc_mask_reg p ## _ack_registers[] __initdata = { \
+ INTC_IRQ_PINS_ACK_16H(p, base), \
+}; \
+ \
+static struct intc_desc p ## _desc __initdata = { \
+ .name = str, \
+ .resource = p ## _resources, \
+ .num_resources = ARRAY_SIZE(p ## _resources), \
+ .hw = INTC_HW_DESC(p ## _vectors, NULL, \
+ p ## _mask_registers, p ## _prio_registers, \
+ p ## _sense_registers, p ## _ack_registers) \
+}
+
#define INTC_IRQ_PINS_32(p, base, vect, str) \
\
static struct resource p ## _resources[] __initdata = { \
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index 4e686cc2..06a5da3 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -7,7 +7,7 @@
#define gic_spi(nr) ((nr) + 32)
/* INTCS */
-#define INTCS_VECT_BASE 0x2200
+#define INTCS_VECT_BASE 0x3400
#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 8254ab8..915d009 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -457,6 +457,8 @@
SHDMA_SLAVE_SDHI1_TX,
SHDMA_SLAVE_SDHI2_RX,
SHDMA_SLAVE_SDHI2_TX,
+ SHDMA_SLAVE_FSIA_RX,
+ SHDMA_SLAVE_FSIA_TX,
SHDMA_SLAVE_MMCIF_RX,
SHDMA_SLAVE_MMCIF_TX,
SHDMA_SLAVE_USB0_TX,
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
index cad5757..ac75857 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -482,6 +482,9 @@
GPIO_FN_FSIAILR_PU,
GPIO_FN_FSIAIBT_PU,
GPIO_FN_FSIAISLD_PU,
+
+ /* end of GPIO */
+ GPIO_NR,
};
/* DMA slave IDs */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 6447e0a..2587a22 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -19,6 +19,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/module.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/sh_intc.h>
@@ -305,14 +306,16 @@
intca_mask_registers, intca_prio_registers,
NULL);
-INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
- INTC_VECT, "sh7372-intca-irq-pins");
+INTC_IRQ_PINS_16(intca_irq_pins_lo, 0xe6900000,
+ INTC_VECT, "sh7372-intca-irq-lo");
+
+INTC_IRQ_PINS_16H(intca_irq_pins_hi, 0xe6900000,
+ INTC_VECT, "sh7372-intca-irq-hi");
+
enum {
UNUSED_INTCS = 0,
ENABLED_INTCS,
- INTCS,
-
/* interrupt sources INTCS */
/* IRQ0S - IRQ31S */
@@ -426,8 +429,6 @@
INTCS_VECT(CPORTS2R, 0x1a20),
/* CEC */
INTCS_VECT(JPU6E, 0x1a80),
-
- INTC_VECT(INTCS, 0xf80),
};
static struct intc_group intcs_groups[] __initdata = {
@@ -490,9 +491,6 @@
{ 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
{ MFIS2_INTCS, CPORTS2R, 0, 0,
JPU6E, 0, 0, 0 } },
- { 0xffd20104, 0, 16, /* INTAMASK */
- { 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, INTCS } },
};
/* Priority is needed for INTCA to receive the INTCS interrupt */
@@ -557,18 +555,30 @@
void __init sh7372_init_irq(void)
{
void __iomem *intevtsa;
+ int n;
intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
intevtsa = intcs_ffd2 + 0x100;
intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
register_intc_controller(&intca_desc);
- register_intc_controller(&intca_irq_pins_desc);
+ register_intc_controller(&intca_irq_pins_lo_desc);
+ register_intc_controller(&intca_irq_pins_hi_desc);
register_intc_controller(&intcs_desc);
+ /* setup dummy cascade chip for INTCS */
+ n = evt2irq(0xf80);
+ irq_alloc_desc_at(n, numa_node_id());
+ irq_set_chip_and_handler_name(n, &dummy_irq_chip,
+ handle_level_irq, "level");
+ set_irq_flags(n, IRQF_VALID); /* yuck */
+
/* demux using INTEVTSA */
- irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
- irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
+ irq_set_handler_data(n, (void *)intevtsa);
+ irq_set_chained_handler(n, intcs_demux);
+
+ /* unmask INTCS in INTAMASK */
+ iowrite16(0, intcs_ffd2 + 0x104);
}
static unsigned short ffd2[0x200];
diff --git a/arch/arm/mach-shmobile/pfc-r8a7740.c b/arch/arm/mach-shmobile/pfc-r8a7740.c
index a4fff69..670fe18 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7740.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7740.c
@@ -22,6 +22,7 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <mach/r8a7740.h>
+#include <mach/irqs.h>
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
@@ -2527,6 +2528,41 @@
{ },
};
+static struct pinmux_irq pinmux_irqs[] = {
+ PINMUX_IRQ(evt2irq(0x0200), PORT2_FN0, PORT13_FN0), /* IRQ0A */
+ PINMUX_IRQ(evt2irq(0x0220), PORT20_FN0), /* IRQ1A */
+ PINMUX_IRQ(evt2irq(0x0240), PORT11_FN0, PORT12_FN0), /* IRQ2A */
+ PINMUX_IRQ(evt2irq(0x0260), PORT10_FN0, PORT14_FN0), /* IRQ3A */
+ PINMUX_IRQ(evt2irq(0x0280), PORT15_FN0, PORT172_FN0), /* IRQ4A */
+ PINMUX_IRQ(evt2irq(0x02A0), PORT0_FN0, PORT1_FN0), /* IRQ5A */
+ PINMUX_IRQ(evt2irq(0x02C0), PORT121_FN0, PORT173_FN0), /* IRQ6A */
+ PINMUX_IRQ(evt2irq(0x02E0), PORT120_FN0, PORT209_FN0), /* IRQ7A */
+ PINMUX_IRQ(evt2irq(0x0300), PORT119_FN0), /* IRQ8A */
+ PINMUX_IRQ(evt2irq(0x0320), PORT118_FN0, PORT210_FN0), /* IRQ9A */
+ PINMUX_IRQ(evt2irq(0x0340), PORT19_FN0), /* IRQ10A */
+ PINMUX_IRQ(evt2irq(0x0360), PORT104_FN0), /* IRQ11A */
+ PINMUX_IRQ(evt2irq(0x0380), PORT42_FN0, PORT97_FN0), /* IRQ12A */
+ PINMUX_IRQ(evt2irq(0x03A0), PORT64_FN0, PORT98_FN0), /* IRQ13A */
+ PINMUX_IRQ(evt2irq(0x03C0), PORT63_FN0, PORT99_FN0), /* IRQ14A */
+ PINMUX_IRQ(evt2irq(0x03E0), PORT62_FN0, PORT100_FN0), /* IRQ15A */
+ PINMUX_IRQ(evt2irq(0x3200), PORT68_FN0, PORT211_FN0), /* IRQ16A */
+ PINMUX_IRQ(evt2irq(0x3220), PORT69_FN0), /* IRQ17A */
+ PINMUX_IRQ(evt2irq(0x3240), PORT70_FN0), /* IRQ18A */
+ PINMUX_IRQ(evt2irq(0x3260), PORT71_FN0), /* IRQ19A */
+ PINMUX_IRQ(evt2irq(0x3280), PORT67_FN0), /* IRQ20A */
+ PINMUX_IRQ(evt2irq(0x32A0), PORT202_FN0), /* IRQ21A */
+ PINMUX_IRQ(evt2irq(0x32C0), PORT95_FN0), /* IRQ22A */
+ PINMUX_IRQ(evt2irq(0x32E0), PORT96_FN0), /* IRQ23A */
+ PINMUX_IRQ(evt2irq(0x3300), PORT180_FN0), /* IRQ24A */
+ PINMUX_IRQ(evt2irq(0x3320), PORT38_FN0), /* IRQ25A */
+ PINMUX_IRQ(evt2irq(0x3340), PORT58_FN0, PORT81_FN0), /* IRQ26A */
+ PINMUX_IRQ(evt2irq(0x3360), PORT57_FN0, PORT168_FN0), /* IRQ27A */
+ PINMUX_IRQ(evt2irq(0x3380), PORT56_FN0, PORT169_FN0), /* IRQ28A */
+ PINMUX_IRQ(evt2irq(0x33A0), PORT50_FN0, PORT170_FN0), /* IRQ29A */
+ PINMUX_IRQ(evt2irq(0x33C0), PORT49_FN0, PORT171_FN0), /* IRQ30A */
+ PINMUX_IRQ(evt2irq(0x33E0), PORT41_FN0, PORT167_FN0), /* IRQ31A */
+};
+
static struct pinmux_info r8a7740_pinmux_info = {
.name = "r8a7740_pfc",
.reserved_id = PINMUX_RESERVED,
@@ -2554,6 +2590,9 @@
.gpio_data = pinmux_data,
.gpio_data_size = ARRAY_SIZE(pinmux_data),
+
+ .gpio_irq = pinmux_irqs,
+ .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
};
void r8a7740_pinmux_init(void)
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c
index e05634c..4a547b8 100644
--- a/arch/arm/mach-shmobile/pfc-sh73a0.c
+++ b/arch/arm/mach-shmobile/pfc-sh73a0.c
@@ -829,14 +829,14 @@
PINMUX_DATA(PORT27_I2C_SCL2_MARK, PORT27_FN2, MSEL2CR_MSEL17_0,
MSEL2CR_MSEL16_1), \
PINMUX_DATA(PORT27_I2C_SCL3_MARK, PORT27_FN3, MSEL2CR_MSEL19_0,
- MSEL2CR_MSEL18_0), \
+ MSEL2CR_MSEL18_1), \
PINMUX_DATA(MFG0_OUT1_MARK, PORT27_FN4), \
PINMUX_DATA(PORT27_IROUT_MARK, PORT27_FN7),
PINMUX_DATA(XDVFS2_MARK, PORT28_FN1), \
PINMUX_DATA(PORT28_I2C_SDA2_MARK, PORT28_FN2, MSEL2CR_MSEL17_0,
MSEL2CR_MSEL16_1), \
PINMUX_DATA(PORT28_I2C_SDA3_MARK, PORT28_FN3, MSEL2CR_MSEL19_0,
- MSEL2CR_MSEL18_0), \
+ MSEL2CR_MSEL18_1), \
PINMUX_DATA(PORT28_TPU1TO1_MARK, PORT28_FN7),
PINMUX_DATA(SIM_RST_MARK, PORT29_FN1), \
PINMUX_DATA(PORT29_TPU1TO1_MARK, PORT29_FN4),
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index 45fa392..5a2b69c 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -16,11 +16,13 @@
#include <linux/device.h>
#include <linux/smp.h>
#include <linux/io.h>
+#include <linux/of.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <mach/common.h>
-#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2())
+#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
+ of_machine_is_compatible("renesas,sh73a0"))
#define is_r8a7779() machine_is_marzen()
static unsigned int __init shmobile_smp_get_core_count(void)
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 14edb5c..ec4eb49 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/delay.h>
+#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
@@ -60,6 +61,12 @@
void __init r8a7740_map_io(void)
{
iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
+
+ /*
+ * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
+ * enough to allocate the frame buffer memory.
+ */
+ init_consistent_dma_size(12 << 20);
}
/* SCIFA0 */
@@ -350,19 +357,19 @@
i2c_write(reg, ICSTART, i2c_read(reg, ICSTART) | 0x10);
i2c_read(reg, ICSTART); /* dummy read */
- mdelay(100);
+ udelay(10);
i2c_write(reg, ICCR, 0x01);
- i2c_read(reg, ICCR);
i2c_write(reg, ICSTART, 0x00);
- i2c_read(reg, ICSTART);
+
+ udelay(10);
i2c_write(reg, ICCR, 0x10);
- mdelay(100);
+ udelay(10);
i2c_write(reg, ICCR, 0x00);
- mdelay(100);
+ udelay(10);
i2c_write(reg, ICCR, 0x10);
- mdelay(100);
+ udelay(10);
iounmap(reg);
}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 2fe8f83..6a4bd58 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -22,6 +22,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
+#include <linux/of_platform.h>
#include <linux/uio_driver.h>
#include <linux/delay.h>
#include <linux/input.h>
@@ -461,6 +462,16 @@
.chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
.mid_rid = 0xce,
}, {
+ .slave_id = SHDMA_SLAVE_FSIA_TX,
+ .addr = 0xfe1f0024,
+ .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+ .mid_rid = 0xb1,
+ }, {
+ .slave_id = SHDMA_SLAVE_FSIA_RX,
+ .addr = 0xfe1f0020,
+ .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+ .mid_rid = 0xb2,
+ }, {
.slave_id = SHDMA_SLAVE_MMCIF_TX,
.addr = 0xe6bd0034,
.chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
@@ -1092,3 +1103,50 @@
/* override timer setup with soc-specific code */
shmobile_timer.init = sh7372_earlytimer_init;
}
+
+#ifdef CONFIG_USE_OF
+
+void __init sh7372_add_early_devices_dt(void)
+{
+ shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
+
+ early_platform_add_devices(sh7372_early_devices,
+ ARRAY_SIZE(sh7372_early_devices));
+
+ /* setup early console here as well */
+ shmobile_setup_console();
+}
+
+static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
+ { }
+};
+
+void __init sh7372_add_standard_devices_dt(void)
+{
+ /* clocks are setup late during boot in the case of DT */
+ sh7372_clock_init();
+
+ platform_add_devices(sh7372_early_devices,
+ ARRAY_SIZE(sh7372_early_devices));
+
+ of_platform_populate(NULL, of_default_bus_match_table,
+ sh7372_auxdata_lookup, NULL);
+}
+
+static const char *sh7372_boards_compat_dt[] __initdata = {
+ "renesas,sh7372",
+ NULL,
+};
+
+DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
+ .map_io = sh7372_map_io,
+ .init_early = sh7372_add_early_devices_dt,
+ .nr_irqs = NR_IRQS_LEGACY,
+ .init_irq = sh7372_init_irq,
+ .handle_irq = shmobile_handle_irq_intc,
+ .init_machine = sh7372_add_standard_devices_dt,
+ .timer = &shmobile_timer,
+ .dt_compat = sh7372_boards_compat_dt,
+MACHINE_END
+
+#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 8b79e79..a689197 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -19,9 +19,27 @@
*
*/
#include <linux/platform_device.h>
+#include <linux/delay.h>
#include <asm/mach/time.h>
#include <asm/smp_twd.h>
+void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
+ unsigned int mult, unsigned int div)
+{
+ /* calculate a worst-case loops-per-jiffy value
+ * based on maximum cpu core mhz setting and the
+ * __delay() implementation in arch/arm/lib/delay.S
+ *
+ * this will result in a longer delay than expected
+ * when the cpu core runs on lower frequencies.
+ */
+
+ unsigned int value = (1000000 * mult) / (HZ * div);
+
+ if (!preset_lpj)
+ preset_lpj = max_cpu_core_mhz * value;
+}
+
static void __init shmobile_late_time_init(void)
{
/*
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 10d1608..af95af2 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -16,6 +16,7 @@
#include <linux/bitops.h>
#include <linux/io.h>
#include <linux/gpio.h>
+#include <linux/leds.h>
/*
* GPIO unit register offsets.
@@ -289,12 +290,34 @@
return;
spin_lock_irqsave(&ochip->lock, flags);
- __set_level(ochip, pin, 0);
- __set_blinking(ochip, pin, blink);
+ __set_level(ochip, pin & 31, 0);
+ __set_blinking(ochip, pin & 31, blink);
spin_unlock_irqrestore(&ochip->lock, flags);
}
EXPORT_SYMBOL(orion_gpio_set_blink);
+#define ORION_BLINK_HALF_PERIOD 100 /* ms */
+
+int orion_gpio_led_blink_set(unsigned gpio, int state,
+ unsigned long *delay_on, unsigned long *delay_off)
+{
+
+ if (delay_on && delay_off && !*delay_on && !*delay_off)
+ *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;
+
+ switch (state) {
+ case GPIO_LED_NO_BLINK_LOW:
+ case GPIO_LED_NO_BLINK_HIGH:
+ orion_gpio_set_blink(gpio, 0);
+ gpio_set_value(gpio, state);
+ break;
+ case GPIO_LED_BLINK:
+ orion_gpio_set_blink(gpio, 1);
+ }
+ return 0;
+}
+EXPORT_SYMBOL_GPL(orion_gpio_led_blink_set);
+
/*****************************************************************************
* Orion GPIO IRQ
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
index 3abf304..bec0c98 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -19,6 +19,8 @@
*/
void orion_gpio_set_unused(unsigned pin);
void orion_gpio_set_blink(unsigned pin, int blink);
+int orion_gpio_led_blink_set(unsigned gpio, int state,
+ unsigned long *delay_on, unsigned long *delay_off);
#define GPIO_INPUT_OK (1 << 0)
#define GPIO_OUTPUT_OK (1 << 1)
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
index 1d3bfb2..0f50ef3 100644
--- a/drivers/mtd/nand/orion_nand.c
+++ b/drivers/mtd/nand/orion_nand.c
@@ -13,6 +13,7 @@
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/of.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
@@ -74,11 +75,13 @@
static int __init orion_nand_probe(struct platform_device *pdev)
{
struct mtd_info *mtd;
+ struct mtd_part_parser_data ppdata = {};
struct nand_chip *nc;
struct orion_nand_data *board;
struct resource *res;
void __iomem *io_base;
int ret = 0;
+ u32 val = 0;
nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
if (!nc) {
@@ -101,7 +104,32 @@
goto no_res;
}
- board = pdev->dev.platform_data;
+ if (pdev->dev.of_node) {
+ board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
+ GFP_KERNEL);
+ if (!board) {
+ printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");
+ ret = -ENOMEM;
+ goto no_res;
+ }
+ if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
+ board->cle = (u8)val;
+ else
+ board->cle = 0;
+ if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
+ board->ale = (u8)val;
+ else
+ board->ale = 1;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "bank-width", &val))
+ board->width = (u8)val * 8;
+ else
+ board->width = 8;
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "chip-delay", &val))
+ board->chip_delay = (u8)val;
+ } else
+ board = pdev->dev.platform_data;
mtd->priv = nc;
mtd->owner = THIS_MODULE;
@@ -115,6 +143,10 @@
if (board->chip_delay)
nc->chip_delay = board->chip_delay;
+ WARN(board->width > 16,
+ "%d bit bus width out of range",
+ board->width);
+
if (board->width == 16)
nc->options |= NAND_BUSWIDTH_16;
@@ -129,8 +161,9 @@
}
mtd->name = "orion_nand";
- ret = mtd_device_parse_register(mtd, NULL, NULL, board->parts,
- board->nr_parts);
+ ppdata.of_node = pdev->dev.of_node;
+ ret = mtd_device_parse_register(mtd, NULL, &ppdata,
+ board->parts, board->nr_parts);
if (ret) {
nand_release(mtd);
goto no_dev;
@@ -161,11 +194,19 @@
return 0;
}
+#ifdef CONFIG_OF
+static struct of_device_id orion_nand_of_match_table[] = {
+ { .compatible = "mrvl,orion-nand", },
+ {},
+};
+#endif
+
static struct platform_driver orion_nand_driver = {
.remove = __devexit_p(orion_nand_remove),
.driver = {
.name = "orion_nand",
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(orion_nand_of_match_table),
},
};
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index bba3ab2..8fd255f 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -217,7 +217,7 @@
|| MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
|| ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \
|| MACH_VPAC270 || MACH_BALLOON3 || MACH_COLIBRI \
- || MACH_COLIBRI320)
+ || MACH_COLIBRI320 || MACH_H4700)
select PCMCIA_SA1111 if ARCH_LUBBOCK && SA1111
select PCMCIA_SOC_COMMON
help
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index 47525de..7745b51 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -69,6 +69,7 @@
pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += pxa2xx_balloon3.o
pxa2xx-obj-$(CONFIG_MACH_COLIBRI) += pxa2xx_colibri.o
pxa2xx-obj-$(CONFIG_MACH_COLIBRI320) += pxa2xx_colibri.o
+pxa2xx-obj-$(CONFIG_MACH_H4700) += pxa2xx_hx4700.o
obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y)
diff --git a/drivers/pcmcia/pxa2xx_hx4700.c b/drivers/pcmcia/pxa2xx_hx4700.c
new file mode 100644
index 0000000..7dfef3e
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_hx4700.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2012 Paul Parsons <lost.distance@yahoo.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+
+#include <asm/mach-types.h>
+#include <mach/hx4700.h>
+
+#include "soc_common.h"
+
+static struct gpio gpios[] = {
+ { GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" },
+ { EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" },
+};
+
+static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+ int ret;
+
+ ret = gpio_request_array(gpios, ARRAY_SIZE(gpios));
+ if (ret)
+ goto out;
+
+ /*
+ * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq().
+ * The asic3 default IRQ type is level trigger low level detect, exactly
+ * the the signal present on GPIOD4_CF_nCD when a CF card is inserted.
+ * If the IRQ type is not changed, the asic3 interrupt handler will loop
+ * repeatedly because it is unable to clear the level trigger interrupt.
+ */
+ irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH);
+
+ skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD;
+ skt->stat[SOC_STAT_CD].name = "PCMCIA CD";
+ skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB;
+ skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready";
+
+out:
+ return ret;
+}
+
+static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+ gpio_free_array(gpios, ARRAY_SIZE(gpios));
+}
+
+static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+ struct pcmcia_state *state)
+{
+ state->vs_3v = 1;
+ state->vs_Xv = 0;
+}
+
+static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+ const socket_state_t *state)
+{
+ switch (state->Vcc) {
+ case 0:
+ gpio_set_value(EGPIO4_CF_3V3_ON, 0);
+ break;
+ case 33:
+ gpio_set_value(EGPIO4_CF_3V3_ON, 1);
+ break;
+ default:
+ printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc);
+ return -EINVAL;
+ }
+
+ gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0);
+
+ return 0;
+}
+
+static struct pcmcia_low_level hx4700_pcmcia_ops = {
+ .owner = THIS_MODULE,
+ .nr = 1,
+ .hw_init = hx4700_pcmcia_hw_init,
+ .hw_shutdown = hx4700_pcmcia_hw_shutdown,
+ .socket_state = hx4700_pcmcia_socket_state,
+ .configure_socket = hx4700_pcmcia_configure_socket,
+};
+
+static struct platform_device *hx4700_pcmcia_device;
+
+static int __init hx4700_pcmcia_init(void)
+{
+ struct platform_device *pdev;
+
+ if (!machine_is_h4700())
+ return -ENODEV;
+
+ pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1,
+ &hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops));
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ hx4700_pcmcia_device = pdev;
+
+ return 0;
+}
+
+static void __exit hx4700_pcmcia_exit(void)
+{
+ platform_device_unregister(hx4700_pcmcia_device);
+}
+
+module_init(hx4700_pcmcia_init);
+module_exit(hx4700_pcmcia_exit);
+
+MODULE_AUTHOR("Paul Parsons <lost.distance@yahoo.com>");
+MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index ed793b7..ef6faa5 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -138,6 +138,7 @@
#define ASIC3_GPIOC13_nPWAIT ASIC3_CONFIG_GPIO(45, 1, 1, 0)
#define ASIC3_GPIOC14_nPIOIS16 ASIC3_CONFIG_GPIO(46, 1, 1, 0)
#define ASIC3_GPIOC15_nPIOR ASIC3_CONFIG_GPIO(47, 1, 0, 0)
+#define ASIC3_GPIOD4_CF_nCD ASIC3_CONFIG_GPIO(52, 1, 0, 0)
#define ASIC3_GPIOD11_nCIOIS16 ASIC3_CONFIG_GPIO(59, 1, 0, 0)
#define ASIC3_GPIOD12_nCWAIT ASIC3_CONFIG_GPIO(60, 1, 0, 0)
#define ASIC3_GPIOD15_nPIOW ASIC3_CONFIG_GPIO(63, 1, 0, 0)
diff --git a/include/linux/ti_wilink_st.h b/include/linux/ti_wilink_st.h
index 2ef4385..3ca0269 100644
--- a/include/linux/ti_wilink_st.h
+++ b/include/linux/ti_wilink_st.h
@@ -25,6 +25,8 @@
#ifndef TI_WILINK_ST_H
#define TI_WILINK_ST_H
+#include <linux/skbuff.h>
+
/**
* enum proto-type - The protocol on WiLink chips which share a
* common physical interface like UART.