| commit | 4a632cec8884b3eca70fb644bcf56a985dc31ebf | [log] [tgz] |
|---|---|---|
| author | Zong Li <zong@andestech.com> | Thu Mar 15 16:50:50 2018 +0800 |
| committer | Palmer Dabbelt <palmer@sifive.com> | Mon Apr 02 20:00:56 2018 -0700 |
| tree | fd46d66fa779436e6104de7564faa4fb34d6e4e1 | |
| parent | 4aad074c9c1d1302c504e1a26fe434878fe08cd5 [diff] |
RISC-V: Enable module support in defconfig Signed-off-by: Zong Li <zong@andestech.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 47dacf0..bca0eee 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig
@@ -73,3 +73,5 @@ CONFIG_ROOT_NFS=y # CONFIG_RCU_TRACE is not set CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y