tree e88fd50b5e791760c7abb20f01e087c53583fe34
parent 5707291c6cada6db7344c90a548d02f427bf376c
author Harvey Hunt <harvey.hunt@imgtec.com> 1462811392 +0100
committer Stephen Boyd <sboyd@codeaurora.org> 1463089705 -0700

clk: ingenic: Allow divider value to be divided

The JZ4780's MSC clock divider registers multiply the clock divider by 2.
This means that MMC devices run at half their expected speed. Add the
ability to divide the clock divider in order to solve this.

Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>