tree 7348889850e9f896bda2842ad0e3c15165832fad
parent 5343325ff3dd299f459fa9dacbd95dca5c9bf215
author Boris Brezillon <boris.brezillon@free-electrons.com> 1432644177 +0200
committer Michael Turquette <mturquette@linaro.org> 1433369827 -0700

clk: mvebu: add missing CESA gate clk

Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>