| commit | 037602705109ec2ab96340bea93ad87daa3ac046 | [log] [tgz] |
|---|---|---|
| author | Max Filippov <jcmvbkbc@gmail.com> | Wed Dec 05 12:48:19 2018 -0800 |
| committer | Max Filippov <jcmvbkbc@gmail.com> | Wed Dec 05 12:53:07 2018 -0800 |
| tree | 616c10e2e60b8a6bfbe388366ea1c1c3f170dafb | |
| parent | f37598be4e3896359e87c824be57ddddc280cc3f [diff] |
xtensa: don't use l32r opcode directly xtensa assembler is capable of representing register loads with either movi + addmi, l32r or const16, depending on the core configuration. Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let the assembler relax them. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>