tree 5a8cfa266582125cf12daf26a9f6802adab20357
parent 5adba7c2daaecccf377e7ed5a2996caedd5384f1
author Jisheng Zhang <jszhang@marvell.com> 1419584281 +0800
committer Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 1420641404 +0100

ARM: dts: berlin: correct BG2Q's SM GPIO location.

The gpio4 and gpio5 are in 0xf7fc0000 apb which is located in the SM domain.
This patch moves gpio4 and gpio5 to the correct location. This patch also
renames them as the following to match the names we internally used in
marvell:
	gpio4 -> sm_gpio1
	gpio5 -> sm_gpio0
	porte -> portf
	portf -> porte

This also matches what we did for BG2 and BG2CD's SM GPIO.

Cc: stable@vger.kernel.org # 3.16+
Fixes: cedf57fc4f2f ("ARM: dts: berlin: add the BG2Q GPIO nodes")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>