OMAP clock: drop RATE_FIXED clock flag
The RATE_FIXED clock flag is pointless. In the OMAP1 clock code, it
simply causes the omap1_clk_round_rate() function to return the
current rate of the clock. omap1_clk_round_rate(), however, should
never be called for a fixed-rate clock, since none of these clocks
have a .round_rate function pointer set in their struct clk records.
Similarly, in the OMAP2+ clock code, the RATE_FIXED flag just causes
the clock code to emit a warning if the OMAP clock maintainer was
foolish enough to add a .round_rate function pointer to a fixed-rate
clock. "Doctor, it hurts when I pretend that a fixed-rate clock is
rate-changeable." "Then don't pretend that a fixed-rate clock is
rate-changeable." It has no functional value. This patch drops the
RATE_FIXED clock flag, removing it from all clocks that are so marked.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index b389584..0438b6e 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -55,7 +55,6 @@
.name = "func_32k_ck",
.ops = &clkops_null,
.rate = 32000,
- .flags = RATE_FIXED,
.clkdm_name = "wkup_clkdm",
};
@@ -63,7 +62,6 @@
.name = "secure_32k_ck",
.ops = &clkops_null,
.rate = 32768,
- .flags = RATE_FIXED,
.clkdm_name = "wkup_clkdm",
};
@@ -88,7 +86,6 @@
.name = "alt_ck",
.ops = &clkops_null,
.rate = 54000000,
- .flags = RATE_FIXED,
.clkdm_name = "wkup_clkdm",
};
@@ -134,7 +131,7 @@
.ops = &clkops_apll96,
.parent = &sys_ck,
.rate = 96000000,
- .flags = RATE_FIXED | ENABLE_ON_INIT,
+ .flags = ENABLE_ON_INIT,
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_96M_PLL_SHIFT,
@@ -145,7 +142,7 @@
.ops = &clkops_apll54,
.parent = &sys_ck,
.rate = 54000000,
- .flags = RATE_FIXED | ENABLE_ON_INIT,
+ .flags = ENABLE_ON_INIT,
.clkdm_name = "wkup_clkdm",
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_54M_PLL_SHIFT,