| commit | 59d711e9ddd2f68822a2a99fc939e11a9288b73e | [log] [tgz] |
|---|---|---|
| author | Andrew Bresticker <abrestic@chromium.org> | Wed Sep 25 14:12:52 2013 -0700 |
| committer | Tomasz Figa <t.figa@samsung.com> | Wed Jan 08 18:02:43 2014 +0100 |
| tree | e0b82bf9b8c9cee448339786f8e4d5d167e1a6e4 | |
| parent | 3538a2cf0e04ad69840d74f46f7f8af920d913b5 [diff] |
ARM: dts: exynos5420: add input clocks to audss clock controller Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in) for the AudioSS clock controller. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>