tree e563fde69b9b305469d92fbce919ff3c96adfa73
parent 814d4f2e153dfb337ee894d1f23863e623add4ab
author Maxime Ripard <maxime.ripard@free-electrons.com> 1370685944 +0200
committer Linus Walleij <linus.walleij@linaro.org> 1371376651 +0200

pinctrl: sunxi: Add external interrupts support

The port controller IP found in the Allwinner A10 and A13 can use few of
the pins it manage as an interrupt source, called external interrupts in
the datasheet.

The number of these external interrupts are SoCs specific, but the
current upper limit is 32. In order to work, the external interrupts'
pins have to be muxed to a specific function to generate an interrupt.

This patch adds the irqchip and the needed logic to use the PIO
controller as an interrupt controller.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>