commit 6fa7da249269a6146ce456c43098901c81c8afdf
author Marc Kleine-Budde <mkl@pengutronix.de> Thu Aug 27 14:24:48 2015 +0200
committer Marc Kleine-Budde <mkl@pengutronix.de> Mon Sep 21 08:38:23 2015 +0200
tree f500d4752ee15181817b0ebf8eb13ca691415e11
parent 1ba763d1d4bda61bfb9b8e5154e6cf39a3e2d0e6

can: flexcan: enable interrupts atomically at the end of flexcan_chip_start()

This patch defers the writing of the interrupts bits of the CTRL register order
to enables all interrupts atomically at the the of the flexcan_chip_start()
function.

Suggested-by: Torsten Lang <torsten.lang@uweschneider.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

drivers/net/can/flexcan.c

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 28b6283..868fe94 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -878,6 +878,8 @@
 
 	/* save for later use */
 	priv->reg_ctrl_default = reg_ctrl;
+	/* leave interrupts disabled for now */
+	reg_ctrl &= ~FLEXCAN_CTRL_ERR_ALL;
 	netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
 	flexcan_write(reg_ctrl, &regs->ctrl);
 
@@ -937,8 +939,11 @@
 
 	priv->can.state = CAN_STATE_ERROR_ACTIVE;
 
-	/* enable FIFO interrupts */
+	/* enable interrupts atomically */
+	disable_irq(dev->irq);
+	flexcan_write(priv->reg_ctrl_default, &regs->ctrl);
 	flexcan_write(FLEXCAN_IFLAG_DEFAULT, &regs->imask1);
+	enable_irq(dev->irq);
 
 	/* print chip status */
 	netdev_dbg(dev, "%s: reading mcr=0x%08x ctrl=0x%08x\n", __func__,