| commit | 70a65240efb1116f4f580c2f8235ba58000889b0 | [log] [tgz] |
|---|---|---|
| author | Tony Lindgren <tony@atomide.com> | Fri Dec 15 09:41:09 2017 -0800 |
| committer | Tony Lindgren <tony@atomide.com> | Thu Dec 21 07:28:54 2017 -0800 |
| tree | 8c57bd4d30ce29a2c1a5016f50aa505915b7cc1e | |
| parent | 49a0a3d805df3b7b4f8a04db6dbf55aa36fd762c [diff] |
bus: ti-sysc: Add register bits for interconnect target modules Let's add data for the known interconnect target module types by mapping their register bits. Note that we can handle many quirks for the older omap2 type1 modules directly in the driver without a need for adding custom properties. Signed-off-by: Tony Lindgren <tony@atomide.com>