| commit | 71dce58c8e90872d85b6d36035d4d39b41e79fdd | [log] [tgz] |
|---|---|---|
| author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | Tue Jun 07 17:19:14 2016 +0300 |
| committer | Mika Kuoppala <mika.kuoppala@intel.com> | Wed Jun 08 16:26:05 2016 +0300 |
| tree | 63fac5ec63395f82235c381c5354a3db097dfc73 | |
| parent | 590e8ff04bc0182dce97228e5e352d6413d80456 [diff] [blame] |
drm/i915/skl: Extend WaDisableChickenBitTSGBarrierAckForFFSliceCS There is ambiguity in the documentation between D0 and E0. Extend this workaround to E0. References: BSID#779 Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-23-git-send-email-mika.kuoppala@intel.com
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 9169f58..cf8d0bf 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1085,7 +1085,7 @@ _MASKED_BIT_ENABLE(GEN9_FFSC_PERCTX_PREEMPT_CTRL)); } - if (IS_SKL_REVID(dev_priv, 0, SKL_REVID_D0)) { + if (IS_SKL_REVID(dev_priv, 0, SKL_REVID_E0)) { /* WaDisableChickenBitTSGBarrierAckForFFSliceCS:skl */ I915_WRITE(FF_SLICE_CS_CHICKEN2, _MASKED_BIT_ENABLE(GEN9_TSG_BARRIER_ACK_DISABLE));