| commit | 9916716a1bb677be8371f602f53989bf04a70d7f | [log] [tgz] |
|---|---|---|
| author | Lendacky, Thomas <Thomas.Lendacky@amd.com> | Wed Jun 28 13:43:09 2017 -0500 |
| committer | David S. Miller <davem@davemloft.net> | Thu Jun 29 15:14:18 2017 -0400 |
| tree | 2d7481be8671ef53c4fb7c8c40f94034d021f6a2 | |
| parent | f00ba49d8ef9b7a8a9f17be4128fad397e42683b [diff] |
amd-xgbe: Prepare for more fine grained cache coherency controls In prep for setting fine grained read and write DMA cache coherency controls, allow specific values to be used to set the cache coherency registers. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>